Age | Commit message (Expand) | Author |
2024-03-23 | Merge tag 'timers-core-2024-03-23' of git://git.kernel.org/pub/scm/linux/kern... | Linus Torvalds |
2024-03-13 | clocksource/drivers/timer-riscv: Clear timer interrupt on timer initialization | Ley Foon Tan |
2024-01-22 | clocksource: extend the max_delta_ns of timer-riscv and timer-clint to ULONG_MAX | Vincent Chen |
2023-12-27 | clocksource/timer-riscv: Add riscv_clock_shutdown callback | Joshua Yeong |
2023-11-10 | Merge tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/ker... | Linus Torvalds |
2023-11-09 | riscv: Rearrange hwcap.h and cpufeature.h | Xiao Wang |
2023-11-08 | Merge tag 'riscv-for-linus-6.7-rc1' of git://git.kernel.org/pub/scm/linux/ker... | Linus Torvalds |
2023-10-31 | clocksource: timer-riscv: Increase rating of clock_event_device for Sstc | Anup Patel |
2023-10-31 | clocksource: timer-riscv: Don't enable/disable timer interrupt | Anup Patel |
2023-10-11 | clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu | Sunil V L |
2023-06-01 | clocksource/timer-riscv: Add ACPI support | Sunil V L |
2023-06-01 | clocksource/timer-riscv: Refactor riscv_timer_init_dt() | Sunil V L |
2023-02-13 | clocksource/drivers/riscv: Patch riscv_clock_next_event() jump before first use | Matt Evans |
2023-02-13 | clocksource/drivers/riscv: Get rid of clocksource_arch_init() callback | Lad Prabhakar |
2023-02-13 | clocksource/drivers/riscv: Increase the clock source rating | Samuel Holland |
2023-02-13 | clocksource/drivers/timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT | Anup Patel |
2022-12-01 | Revert "clocksource/drivers/riscv: Events are stopped during CPU suspend" | Conor Dooley |
2022-08-11 | RISC-V: Add Sstc extension support | Palmer Dabbelt |
2022-08-11 | RISC-V: Prefer sstc extension if available | Atish Patra |
2022-07-19 | riscv: cpu: Add 64bit hartid support on RV64 | Sunil V L |
2022-05-18 | clocksource/drivers/riscv: Events are stopped during CPU suspend | Samuel Holland |
2021-10-04 | RISC-V: KVM: Add timer functionality | Atish Patra |
2020-08-20 | RISC-V: Remove CLINT related code from timer and arch | Anup Patel |
2020-06-09 | clocksource/drivers/timer-riscv: Use per-CPU timer interrupt | Anup Patel |
2020-01-04 | clocksource: riscv: add notrace to riscv_sched_clock | Zong Li |
2019-11-13 | riscv: add support for MMIO access to the timer registers | Christoph Hellwig |
2019-11-05 | riscv: abstract out CSR names for supervisor vs machine mode | Christoph Hellwig |
2019-09-05 | riscv: don't use the rdtime(h) pseudo-instructions | Christoph Hellwig |
2019-08-06 | RISC-V: Remove per cpu clocksource | Atish Patra |
2019-03-23 | clocksource/drivers/riscv: Fix clocksource mask | Atish Patra |
2019-02-23 | clocksource/drivers/riscv: Add required checks during clock source init | Atish Patra |
2018-12-18 | clocksource/drivers/riscv: Change name riscv_timer to timer-riscv | Daniel Lezcano |