| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-06-10 | treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (pa... | Thomas Gleixner |
| 2017-11-01 | CLK: SPEAr: make structure field and function argument as const | Bhumika Goyal |
| 2015-07-17 | Update Viresh Kumar's email address | Viresh Kumar |
| 2012-06-20 | Viresh has moved | Viresh Kumar |
| 2012-05-12 | SPEAr: clk: Add General Purpose Timer Synthesizer clock | Viresh Kumar |
| 2012-05-12 | SPEAr: clk: Add Fractional Synthesizer clock | Viresh Kumar |
| 2012-05-12 | SPEAr: clk: Add Auxiliary Synthesizer clock | Viresh Kumar |
| 2012-05-12 | SPEAr: clk: Add VCO-PLL Synthesizer clock | Viresh Kumar |
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index : linux | |
| Torvalds' mirror for benchmark reasons |
| summaryrefslogtreecommitdiff |