| Age | Commit message (Expand) | Author |
|---|
| 2019-03-04 | RISC-V: Fixmap support and MM cleanups | Palmer Dabbelt |
| 2019-03-04 | arch: riscv: fix logic error in parse_dtb | Andreas Schwab |
| 2019-03-04 | RISC-V: Move cpuid to hartid mapping to SMP. | Atish Patra |
| 2019-02-21 | RISC-V: Move setup_vm() to mm/init.c | Anup Patel |
| 2019-02-21 | RISC-V: Move setup_bootmem() to mm/init.c | Anup Patel |
| 2019-02-21 | RISC-V: Setup init_mm before parse_early_param() | Anup Patel |
| 2019-02-11 | riscv: use pr_info and friends | Johan Hovold |
| 2019-01-23 | riscv: fixup max_low_pfn with PFN_DOWN. | Guo Ren |
| 2019-01-07 | arch: riscv: support kernel command line forcing when no DTB passed | Paul Walmsley |
| 2018-12-17 | RISC-V: Remove EARLY_PRINTK support | Anup Patel |
| 2018-10-22 | RISC-V: SMP cleanup and new features | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Use Linux logical CPU number instead of hartid | Atish Patra |
| 2018-10-22 | RISC-V: Add logical CPU indexing for RISC-V | Atish Patra |
| 2018-10-22 | RISC-V: Use swiotlb on RV64 only | Zong Li |
| 2018-10-02 | RISCV: Fix end PFN for low memory | Atish Patra |
| 2018-09-04 | riscv: Do not overwrite initrd_start and initrd_end | Guenter Roeck |
| 2018-08-13 | RISC-V: Add early printk support via the SBI console | Palmer Dabbelt |
| 2018-07-04 | riscv: remove unnecessary of_platform_populate call | Rob Herring |
| 2018-05-19 | riscv: add swiotlb support | Christoph Hellwig |
| 2018-02-20 | Rename sbi_save to parse_dtb to improve code readability | Michael Clark |
| 2018-01-30 | riscv: add ZONE_DMA32 | Christoph Hellwig |
| 2018-01-30 | RISC-V: Remove mem_end command line processing | Palmer Dabbelt |
| 2018-01-30 | RISC-V: Remove duplicate command-line parsing logic | Michael Clark |
| 2017-12-11 | RISC-V: Remove unused CONFIG_HVC_RISCV_SBI code | Palmer Dabbelt |
| 2017-11-30 | RISC-V: Export some expected symbols for modules | Olof Johansson |
| 2017-11-30 | RISC-V: move empty_zero_page definition to C and export it | Olof Johansson |
| 2017-09-26 | RISC-V: Init and Halt Code | Palmer Dabbelt |
