| Age | Commit message (Expand) | Author |
|---|
| 2023-08-15 | mips: remove unneeded #include <asm/export.h> | Masahiro Yamada |
| 2023-04-12 | MIPS: octeon_switch: Remove duplicated labels | Jiaxun Yang |
| 2018-06-14 | Kbuild: rename CC_STACKPROTECTOR[_STRONG] config variables | Linus Torvalds |
| 2017-08-29 | MIPS: Move r4k FP code from r4k_switch.S to r4k_fpu.S | Paul Burton |
| 2015-10-02 | MIPS: Fix octeon FP context switch handling | Paul Burton |
| 2015-02-20 | MIPS: OCTEON: Delete unused COP2 saving code | Aleksey Makarov |
| 2015-02-20 | MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register | Chandrakala Chavva |
| 2015-02-20 | MIPS: OCTEON: Save and restore CP2 SHA3 state | David Daney |
| 2015-02-20 | MIPS: OCTEON: Fix FP context save. | David Daney |
| 2015-02-20 | MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs | David Daney |
| 2014-05-30 | MIPS: OCTEON: Enable use of FPU | David Daney |
| 2013-10-07 | MIPS: stack protector: Fix per-task canary switch | James Hogan |
| 2013-07-01 | MIPS: r4k,octeon,r2300: stack protector: change canary per task | Gregory Fong |
| 2013-06-13 | MIPS: Move cop2 save/restore to switch_to() | Jayachandran C |
| 2013-02-01 | MIPS: Whitespace cleanup. | Ralf Baechle |
| 2012-12-28 | MIPS: Don't include <asm/page.h> unnecessarily. | Ralf Baechle |
| 2012-07-19 | MIPS: Fix race condition with FPU thread task flag during context switch. | Leonid Yegoshin |
| 2011-04-06 | update David Miller's old email address | Justin P. Mattock |
| 2010-02-27 | MIPS: Nuke trailing blank lines | Ralf Baechle |
| 2009-09-17 | MIPS: Consolidate all CONFIG_CPU_HAS_LLSC use in a single C file. | Ralf Baechle |
| 2009-01-11 | MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon. | David Daney |
