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path: root/drivers/gpu/drm/i915/display/intel_dp_link_training.c
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Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_link_training.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_dp_link_training.c21
1 files changed, 13 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index bb8680ac7f4d..e106a9e6ea3b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1164,10 +1164,8 @@ static int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
new_link_rate = intel_dp_max_common_rate(intel_dp);
}
- if (new_lane_count < 0) {
- lt_err(intel_dp, DP_PHY_DPRX, "Link Training Unsuccessful\n");
+ if (new_lane_count < 0)
return -1;
- }
if (intel_dp_is_edp(intel_dp) &&
!intel_dp_can_link_train_fallback_for_edp(intel_dp, new_link_rate, new_lane_count)) {
@@ -1188,7 +1186,7 @@ static int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
}
/* NOTE: @state is only valid for MST links and can be %NULL for SST. */
-static void intel_dp_schedule_fallback_link_training(struct intel_atomic_state *state,
+static bool intel_dp_schedule_fallback_link_training(struct intel_atomic_state *state,
struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{
@@ -1197,7 +1195,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_atomic_state *
if (!intel_digital_port_connected(&dp_to_dig_port(intel_dp)->base)) {
lt_dbg(intel_dp, DP_PHY_DPRX, "Link Training failed on disconnected sink.\n");
- return;
+ return true;
}
if (intel_dp->hobl_active) {
@@ -1205,16 +1203,18 @@ static void intel_dp_schedule_fallback_link_training(struct intel_atomic_state *
"Link Training failed with HOBL active, not enabling it from now on\n");
intel_dp->hobl_failed = true;
} else if (intel_dp_get_link_train_fallback_values(intel_dp, crtc_state)) {
- return;
+ return false;
}
if (drm_WARN_ON(&i915->drm,
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST) &&
!state))
- return;
+ return false;
/* Schedule a Hotplug Uevent to userspace to start modeset */
intel_dp_queue_modeset_retry_for_link(state, encoder, crtc_state);
+
+ return true;
}
/* Perform the link training on all LTTPRs and the DPRX on a link. */
@@ -1533,7 +1533,12 @@ void intel_dp_start_link_train(struct intel_atomic_state *state,
return;
}
- intel_dp_schedule_fallback_link_training(state, intel_dp, crtc_state);
+ if (intel_dp_schedule_fallback_link_training(state, intel_dp, crtc_state))
+ return;
+
+ intel_dp->link.retrain_disabled = true;
+
+ lt_err(intel_dp, DP_PHY_DPRX, "Can't reduce link training parameters after failure\n");
}
void intel_dp_128b132b_sdp_crc16(struct intel_dp *intel_dp,