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path: root/drivers/gpu/drm/amd/display/dc/dce110
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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce110')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c12
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c16
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c6
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c10
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c2
5 files changed, 23 insertions, 23 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
index 6923662413cd..af854f21e9f5 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
@@ -120,13 +120,13 @@ static void wait_for_fbc_state_changed(
}
if (counter == 10) {
- dm_logger_write(
- cp110->base.ctx->logger, LOG_WARNING,
+ DC_LOG_WARNING(
+ cp110->base.ctx->logger,
"%s: wait counter exceeded, changes to HW not applied",
__func__);
} else {
- dm_logger_write(
- cp110->base.ctx->logger, LOG_SYNC,
+ DC_LOG_SYNC(
+ cp110->base.ctx->logger,
"FBC status changed to %d", enabled);
}
@@ -310,8 +310,8 @@ void dce110_compressor_program_compressed_surface_address_and_pitch(
if (compressor->min_compress_ratio == FBC_COMPRESS_RATIO_1TO1)
fbc_pitch = fbc_pitch / 8;
else
- dm_logger_write(
- compressor->ctx->logger, LOG_WARNING,
+ DC_LOG_WARNING(
+ compressor->ctx->logger,
"%s: Unexpected DCE11 compression ratio",
__func__);
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 73e0bcd5ba8f..9e31f06ab4c8 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -816,7 +816,7 @@ void hwss_edp_wait_for_hpd_ready(
dal_gpio_destroy_irq(&hpd);
if (false == edp_hpd_high) {
- dm_logger_write(ctx->logger, LOG_ERROR,
+ DC_LOG_ERROR(ctx->logger,
"%s: wait timed out!\n", __func__);
}
}
@@ -840,7 +840,7 @@ void hwss_edp_power_control(
if (power_up != is_panel_powered_on(hwseq)) {
/* Send VBIOS command to prompt eDP panel power */
- dm_logger_write(ctx->logger, LOG_HW_RESUME_S3,
+ DC_LOG_HW_RESUME_S3(ctx->logger,
"%s: Panel Power action: %s\n",
__func__, (power_up ? "On":"Off"));
@@ -856,11 +856,11 @@ void hwss_edp_power_control(
bp_result = link_transmitter_control(ctx->dc_bios, &cntl);
if (bp_result != BP_RESULT_OK)
- dm_logger_write(ctx->logger, LOG_ERROR,
+ DC_LOG_ERROR(ctx->logger,
"%s: Panel Power bp_result: %d\n",
__func__, bp_result);
} else {
- dm_logger_write(ctx->logger, LOG_HW_RESUME_S3,
+ DC_LOG_HW_RESUME_S3(ctx->logger,
"%s: Skipping Panel Power action: %s\n",
__func__, (power_up ? "On":"Off"));
}
@@ -886,7 +886,7 @@ void hwss_edp_backlight_control(
}
if (enable && is_panel_backlight_on(hws)) {
- dm_logger_write(ctx->logger, LOG_HW_RESUME_S3,
+ DC_LOG_HW_RESUME_S3(ctx->logger,
"%s: panel already powered up. Do nothing.\n",
__func__);
return;
@@ -894,7 +894,7 @@ void hwss_edp_backlight_control(
/* Send VBIOS command to control eDP panel backlight */
- dm_logger_write(ctx->logger, LOG_HW_RESUME_S3,
+ DC_LOG_HW_RESUME_S3(ctx->logger,
"%s: backlight action: %s\n",
__func__, (enable ? "On":"Off"));
@@ -2762,7 +2762,7 @@ static void dce110_program_front_end_for_pipe(
if (pipe_ctx->plane_state->update_flags.bits.full_update)
dc->hwss.set_output_transfer_func(pipe_ctx, pipe_ctx->stream);
- dm_logger_write(dc->ctx->logger, LOG_SURFACE,
+ DC_LOG_SURFACE(dc->ctx->logger,
"Pipe:%d 0x%x: addr hi:0x%x, "
"addr low:0x%x, "
"src: %d, %d, %d,"
@@ -2785,7 +2785,7 @@ static void dce110_program_front_end_for_pipe(
pipe_ctx->plane_state->clip_rect.width,
pipe_ctx->plane_state->clip_rect.height);
- dm_logger_write(dc->ctx->logger, LOG_SURFACE,
+ DC_LOG_SURFACE(dc->ctx->logger,
"Pipe %d: width, height, x, y\n"
"viewport:%d, %d, %d, %d\n"
"recout: %d, %d, %d, %d\n",
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
index c4e877ac95d3..d938047fc17f 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
@@ -771,8 +771,8 @@ static bool dce110_validate_bandwidth(
{
bool result = false;
- dm_logger_write(
- dc->ctx->logger, LOG_BANDWIDTH_CALCS,
+ DC_LOG_BANDWIDTH_CALCS(
+ dc->ctx->logger,
"%s: start",
__func__);
@@ -786,7 +786,7 @@ static bool dce110_validate_bandwidth(
result = true;
if (!result)
- dm_logger_write(dc->ctx->logger, LOG_BANDWIDTH_VALIDATION,
+ DC_LOG_BANDWIDTH_VALIDATION(dc->ctx->logger,
"%s: %dx%d@%d Bandwidth validation failed!\n",
__func__,
context->streams[0]->timing.h_addressable,
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
index 59b4cd329715..a8e93072ab5c 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
@@ -606,7 +606,7 @@ static uint32_t dce110_timing_generator_v_get_vblank_counter(struct timing_gener
static bool dce110_timing_generator_v_did_triggered_reset_occur(
struct timing_generator *tg)
{
- dm_logger_write(tg->ctx->logger, LOG_ERROR,
+ DC_LOG_ERROR(tg->ctx->logger,
"Timing Sync not supported on underlay pipe\n");
return false;
}
@@ -615,7 +615,7 @@ static void dce110_timing_generator_v_setup_global_swap_lock(
struct timing_generator *tg,
const struct dcp_gsl_params *gsl_params)
{
- dm_logger_write(tg->ctx->logger, LOG_ERROR,
+ DC_LOG_ERROR(tg->ctx->logger,
"Timing Sync not supported on underlay pipe\n");
return;
}
@@ -624,7 +624,7 @@ static void dce110_timing_generator_v_enable_reset_trigger(
struct timing_generator *tg,
int source_tg_inst)
{
- dm_logger_write(tg->ctx->logger, LOG_ERROR,
+ DC_LOG_ERROR(tg->ctx->logger,
"Timing Sync not supported on underlay pipe\n");
return;
}
@@ -632,7 +632,7 @@ static void dce110_timing_generator_v_enable_reset_trigger(
static void dce110_timing_generator_v_disable_reset_trigger(
struct timing_generator *tg)
{
- dm_logger_write(tg->ctx->logger, LOG_ERROR,
+ DC_LOG_ERROR(tg->ctx->logger,
"Timing Sync not supported on underlay pipe\n");
return;
}
@@ -640,7 +640,7 @@ static void dce110_timing_generator_v_disable_reset_trigger(
static void dce110_timing_generator_v_tear_down_global_swap_lock(
struct timing_generator *tg)
{
- dm_logger_write(tg->ctx->logger, LOG_ERROR,
+ DC_LOG_ERROR(tg->ctx->logger,
"Timing Sync not supported on underlay pipe\n");
return;
}
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c
index 47390dc58306..809db96a8ba5 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c
@@ -670,7 +670,7 @@ static void dce110_xfmv_set_pixel_storage_depth(
if (!(xfm_dce->lb_pixel_depth_supported & depth)) {
/*we should use unsupported capabilities
* unless it is required by w/a*/
- dm_logger_write(xfm->ctx->logger, LOG_WARNING,
+ DC_LOG_WARNING(xfm->ctx->logger,
"%s: Capability not supported",
__func__);
}