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| author | Thomas Gleixner <tglx@linutronix.de> | 2022-04-12 22:34:21 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2022-04-13 18:39:48 +0200 |
| commit | daf3af4705ba8f49d33ea9b7bafdc9fd9efd49e0 (patch) | |
| tree | c3c35e49a29f81b1e3c940b2fa2c3c48674a1bbe /net | |
| parent | ce522ba9ef7e2d9fb22a39eb3371c0c64e2a433e (diff) | |
| download | linux-daf3af4705ba8f49d33ea9b7bafdc9fd9efd49e0.tar.gz linux-daf3af4705ba8f49d33ea9b7bafdc9fd9efd49e0.tar.bz2 linux-daf3af4705ba8f49d33ea9b7bafdc9fd9efd49e0.zip | |
x86/apic: Clarify i82489DX bit overlap in APIC_LVT0
Daniel stumbled over the bit overlap of the i82498DX external APIC and the
TSC deadline timer configuration bit in modern APICs, which is neither
documented in the code nor in the current SDM. Maciej provided links to
the original i82489DX/486 documentation. See Link.
Remove the i82489DX macro maze, use a i82489DX specific define in the apic
code and document the overlap in a comment.
Reported-by: Daniel Vacek <neelx@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Maciej W. Rozycki <macro@orcam.me.uk>
Link: https://lore.kernel.org/r/87ee22f3ci.ffs@tglx
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions