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authorJakub Kicinski <kuba@kernel.org>2021-01-19 17:32:36 -0800
committerJakub Kicinski <kuba@kernel.org>2021-01-19 17:32:36 -0800
commit719fc6b75f03214a335884dc8b51ce7caa6080d2 (patch)
treec25827ea9a77dc3e7bad9c0869940bb7a7a1b89a /net
parent9f23de418f7e999cc48be915c514db9c54166c0e (diff)
parent4f7cce2724031a1c302cd6b2bed677c2acebba83 (diff)
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Merge branch 'net-ethernet-ti-am65-cpsw-nuss-introduce-support-for-am64x-cpsw3g'
Grygorii Strashko says: ==================== net: ethernet: ti: am65-cpsw-nuss: introduce support for am64x cpsw3g This series introduces basic support for recently introduced TI K3 AM642x SoC [1] which contains 3 port (2 external ports) CPSW3g module. The CPSW3g integrated in MAIN domain and can be configured in multi port or switch modes. In this series only multi port mode is enabled. The initial version of switchdev support was introduced by Vignesh Raghavendra [2] and work is in progress. The overall functionality and DT bindings are similar to other K3 CPSWxg versions, so DT binding changes are minimal and driver is mostly re-used for TI K3 AM642x CPSW3g. The main difference is that TI K3 AM642x SoC is not fully DMA coherent and instead DMA coherency is supported per DMA channel. Patches 1-2 - DT bindings update Patches 3-4 - Update driver to support changed DMA coherency model Patches 5-6 - adds TI K3 AM642x SoC platform data and so enable CPSW3g [1] https://www.ti.com/lit/pdf/spruim2 [2] https://patchwork.ozlabs.org/project/netdev/cover/20201130082046.16292-1-vigneshr@ti.com/ ==================== Link: https://lore.kernel.org/r/20210115192853.5469-1-grygorii.strashko@ti.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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