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| author | Dave Airlie <airlied@redhat.com> | 2016-05-10 15:01:47 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2016-05-10 15:01:47 +1000 |
| commit | 2e726dc4b4e2dd3ae3fe675f9d3af88a2d593ee1 (patch) | |
| tree | bb22392b580c3c58e9973c4a50133d580f861f98 /include | |
| parent | bafb86f5bc3173479002555dea7f31d943b12332 (diff) | |
| parent | ac4b1280319c3032787ac95bfeff14a425c417bf (diff) | |
| download | linux-2e726dc4b4e2dd3ae3fe675f9d3af88a2d593ee1.tar.gz linux-2e726dc4b4e2dd3ae3fe675f9d3af88a2d593ee1.tar.bz2 linux-2e726dc4b4e2dd3ae3fe675f9d3af88a2d593ee1.zip | |
Merge tag 'mediatek-drm-2016-05-09' of git://git.pengutronix.de/git/pza/linux into drm-next
MT8173 DRM support
- device tree binding documentation for all MT8173 display
subsystem components
- basic mediatek-drm driver for MT8173 with two optional,
currently fixed output paths:
- DSI encoder support for DSI and (via bridge) eDP panels
- DPI encoder support for output to HDMI bridge
- necessary clock tree changes for the DPI->HDMI path
- export mtk-smi functions used by mediatek-drm
* tag 'mediatek-drm-2016-05-09' of git://git.pengutronix.de/git/pza/linux:
clk: mediatek: remove hdmitx_dig_cts from TOP clocks
clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output
clk: mediatek: make dpi0_sel propagate rate changes
drm/mediatek: Add DPI sub driver
drm/mediatek: Add DSI sub driver
drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.
dt-bindings: drm/mediatek: Add Mediatek display subsystem dts binding
memory: mtk-smi: export mtk_smi_larb_get/put
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/mt8173-clk.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h index 7956ba1bc974..6094bf7e50ab 100644 --- a/include/dt-bindings/clock/mt8173-clk.h +++ b/include/dt-bindings/clock/mt8173-clk.h @@ -176,7 +176,8 @@ #define CLK_APMIXED_LVDSPLL 13 #define CLK_APMIXED_MSDCPLL2 14 #define CLK_APMIXED_REF2USB_TX 15 -#define CLK_APMIXED_NR_CLK 16 +#define CLK_APMIXED_HDMI_REF 16 +#define CLK_APMIXED_NR_CLK 17 /* INFRA_SYS */ |