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| author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2024-06-12 09:54:33 +0100 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2024-07-12 16:07:05 +0200 |
| commit | cc9b2c590ebacf656bb2063c2f6cbfb7ad7081f3 (patch) | |
| tree | 5d94ff5cce909b047978bcd697949ef5cb2e79b5 /include/crypto | |
| parent | db19d3aa77612983a02bd223b3f273f896b243cf (diff) | |
| download | linux-cc9b2c590ebacf656bb2063c2f6cbfb7ad7081f3.tar.gz linux-cc9b2c590ebacf656bb2063c2f6cbfb7ad7081f3.tar.bz2 linux-cc9b2c590ebacf656bb2063c2f6cbfb7ad7081f3.zip | |
clocksource/drivers/mips-gic-timer: Refine rating computation
It is a good clocksource which usually go as fast as CPU core
and have a low access latency, so raise the base of rating
from Good to desired when we know that it has a stable frequency.
Increase frequency addend dividend to 10000000 (10MHz) to
reasonably accommodate multi GHz level clock, also cap rating
within current level.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Link: https://lore.kernel.org/r/20240612-mips-clks-v2-6-a57e6f49f3db@flygoat.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'include/crypto')
0 files changed, 0 insertions, 0 deletions