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| author | Gayatri Kammela <gayatri.kammela@intel.com> | 2020-02-04 15:01:59 -0800 |
|---|---|---|
| committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2020-02-11 15:03:10 +0200 |
| commit | 2e36ac08a98829b132a9d0bf1ca281af1a931747 (patch) | |
| tree | 0a7b47331e9a3fc11fba25405f20f8002f9ce4ca /drivers/platform/x86/intel_pmc_core.h | |
| parent | 913f984a8347ea967ee9693dfa1e15da78e64661 (diff) | |
| download | linux-2e36ac08a98829b132a9d0bf1ca281af1a931747.tar.gz linux-2e36ac08a98829b132a9d0bf1ca281af1a931747.tar.bz2 linux-2e36ac08a98829b132a9d0bf1ca281af1a931747.zip | |
platform/x86: intel_pmc_core: Dump low power status registers on an S0ix.y failure
Platforms prior to Tiger Lake has no sub-states of S0ix and accessing
device PM states that are latched whenever there is a PC10 entry is
possible with the help of slp_s0_debug_status and slp_s0_dbg_latch
debugfs entries.
If a platform has sub-states of S0ix, no such entries are created.
Hence, dump low power status registers on resume When any attempt to
enter any low power state was unsuccessful.
Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David Box <david.e.box@intel.com>
Suggested-by: David Box <david.e.box@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'drivers/platform/x86/intel_pmc_core.h')
0 files changed, 0 insertions, 0 deletions