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| author | Thomas Gleixner <tglx@linutronix.de> | 2021-08-29 21:19:50 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2021-08-29 21:19:50 +0200 |
| commit | 47fb0cfdb7a71a8a0ff8fe1d117363dc81f6ca77 (patch) | |
| tree | 5c2b55684fbb3804bf9a6a27b052bdcfd986061a /drivers/pinctrl/qcom | |
| parent | 00ed1401a0058e8cca4cc1b6ba14b893e5df746e (diff) | |
| parent | 6e3b473ee06445d4eae2f8b1e143db70ed66f519 (diff) | |
| download | linux-47fb0cfdb7a71a8a0ff8fe1d117363dc81f6ca77.tar.gz linux-47fb0cfdb7a71a8a0ff8fe1d117363dc81f6ca77.tar.bz2 linux-47fb0cfdb7a71a8a0ff8fe1d117363dc81f6ca77.zip | |
Merge tag 'irqchip-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier:
- API updates:
- Treewide conversion to generic_handle_domain_irq() for anything
that looks like a chained interrupt controller
- Update the irqdomain documentation
- Use of bitmap_zalloc() throughout the tree
- New functionalities:
- Support for GICv3 EPPI partitions
- Fixes:
- Qualcomm PDC hierarchy fixes
- Yet another priority decoding fix for the GICv3 pseudo-NMIs
- Fix the apple-aic driver irq_eoi() callback to always unmask
the interrupt
- Properly handle edge interrupts on loongson-pch-pic
- Let the mtk-sysirq driver advertise IRQCHIP_SKIP_SET_WAKE
Link: https://lore.kernel.org/r/20210828121013.2647964-1-maz@kernel.org
Diffstat (limited to 'drivers/pinctrl/qcom')
| -rw-r--r-- | drivers/pinctrl/qcom/pinctrl-msm.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index d70caecd21d2..8476a8ac4451 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1177,7 +1177,6 @@ static void msm_gpio_irq_handler(struct irq_desc *desc) const struct msm_pingroup *g; struct msm_pinctrl *pctrl = gpiochip_get_data(gc); struct irq_chip *chip = irq_desc_get_chip(desc); - int irq_pin; int handled = 0; u32 val; int i; @@ -1192,8 +1191,7 @@ static void msm_gpio_irq_handler(struct irq_desc *desc) g = &pctrl->soc->groups[i]; val = msm_readl_intr_status(pctrl, g); if (val & BIT(g->intr_status_bit)) { - irq_pin = irq_find_mapping(gc->irq.domain, i); - generic_handle_irq(irq_pin); + generic_handle_domain_irq(gc->irq.domain, i); handled++; } } |