summaryrefslogtreecommitdiff
path: root/drivers/net/ethernet/mellanox/mlx5/core/qos.c
diff options
context:
space:
mode:
authorJakub Kicinski <kuba@kernel.org>2024-09-05 20:27:09 -0700
committerJakub Kicinski <kuba@kernel.org>2024-09-12 17:11:24 -0700
commit46ae4d0a489741565520195bddebc3414781e603 (patch)
treeb364bb2c6808d4d1ae4e00c46c123caf7fffe618 /drivers/net/ethernet/mellanox/mlx5/core/qos.c
parent3cfb5aa10cb78571e214e48a3a6e42c11d5288a1 (diff)
parent5abfdfd402699ce7c1e81d1a25bc37f60f7741ff (diff)
downloadlinux-46ae4d0a489741565520195bddebc3414781e603.tar.gz
linux-46ae4d0a489741565520195bddebc3414781e603.tar.bz2
linux-46ae4d0a489741565520195bddebc3414781e603.zip
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR. No conflicts (sort of) and no adjacent changes. This merge reverts commit b3c9e65eb227 ("net: hsr: remove seqnr_lock") from net, as it was superseded by commit 430d67bdcb04 ("net: hsr: Use the seqnr lock for frames received via interlink port.") in net-next. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/qos.c')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/qos.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/qos.c
index 8bce730b5c5b..db2bd3ad63ba 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/qos.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/qos.c
@@ -28,6 +28,9 @@ int mlx5_qos_create_leaf_node(struct mlx5_core_dev *mdev, u32 parent_id,
{
u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
+ if (!(MLX5_CAP_QOS(mdev, nic_element_type) & ELEMENT_TYPE_CAP_MASK_QUEUE_GROUP))
+ return -EOPNOTSUPP;
+
MLX5_SET(scheduling_context, sched_ctx, parent_element_id, parent_id);
MLX5_SET(scheduling_context, sched_ctx, element_type,
SCHEDULING_CONTEXT_ELEMENT_TYPE_QUEUE_GROUP);
@@ -44,6 +47,10 @@ int mlx5_qos_create_inner_node(struct mlx5_core_dev *mdev, u32 parent_id,
u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
void *attr;
+ if (!(MLX5_CAP_QOS(mdev, nic_element_type) & ELEMENT_TYPE_CAP_MASK_TSAR) ||
+ !(MLX5_CAP_QOS(mdev, nic_tsar_type) & TSAR_TYPE_CAP_MASK_DWRR))
+ return -EOPNOTSUPP;
+
MLX5_SET(scheduling_context, sched_ctx, parent_element_id, parent_id);
MLX5_SET(scheduling_context, sched_ctx, element_type,
SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR);