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| author | Sasha Neftin <sasha.neftin@intel.com> | 2018-10-11 10:17:31 +0300 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2018-10-17 13:55:18 -0700 |
| commit | 5586838fe9ced0980e210b39d635ff3842297448 (patch) | |
| tree | 1646f8cca19ced662aac1f065426d27344ec5fa9 /drivers/net/ethernet/intel/igc/igc_regs.h | |
| parent | ab4056126813c889ee6c8fb24ca8f75b84c981ab (diff) | |
| download | linux-5586838fe9ced0980e210b39d635ff3842297448.tar.gz linux-5586838fe9ced0980e210b39d635ff3842297448.tar.bz2 linux-5586838fe9ced0980e210b39d635ff3842297448.zip | |
igc: Add code for PHY support
Add PHY's ID support
Add support for initialization, acquire and release of PHY
Enable register access
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igc/igc_regs.h')
| -rw-r--r-- | drivers/net/ethernet/intel/igc/igc_regs.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/igc/igc_regs.h b/drivers/net/ethernet/intel/igc/igc_regs.h index b5996e474c3c..a1bd3216c906 100644 --- a/drivers/net/ethernet/intel/igc/igc_regs.h +++ b/drivers/net/ethernet/intel/igc/igc_regs.h @@ -39,6 +39,9 @@ #define IGC_SWSM 0x05B50 /* SW Semaphore */ #define IGC_FWSM 0x05B54 /* FW Semaphore */ +/* Function Active and Power State to MNG */ +#define IGC_FACTPS 0x05B30 + /* Interrupt Register Description */ #define IGC_EICS 0x01520 /* Ext. Interrupt Cause Set - W0 */ #define IGC_EIMS 0x01524 /* Ext. Interrupt Mask Set/Read - RW */ |