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| author | Qi Zhang <qi.z.zhang@intel.com> | 2021-03-09 11:07:59 +0800 |
|---|---|---|
| committer | Tony Nguyen <anthony.l.nguyen@intel.com> | 2021-03-22 11:32:11 -0700 |
| commit | b199dddbd399536d5470e10e6bfd7d0e1b5fb71a (patch) | |
| tree | 0c219fbcf944dc75f53d536a127dee533a40718b /drivers/net/ethernet/intel/ice/ice_flow.h | |
| parent | 390bd141808d5019506f0f53a777c3b9cb7c5c62 (diff) | |
| download | linux-b199dddbd399536d5470e10e6bfd7d0e1b5fb71a.tar.gz linux-b199dddbd399536d5470e10e6bfd7d0e1b5fb71a.tar.bz2 linux-b199dddbd399536d5470e10e6bfd7d0e1b5fb71a.zip | |
ice: Support non word aligned input set field
To support FDIR input set with protocol field like DSCP, TTL,
PROT, etc. which is not word aligned, we need to enable field
vector masking.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Chen Bo <BoX.C.Chen@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ice/ice_flow.h')
| -rw-r--r-- | drivers/net/ethernet/intel/ice/ice_flow.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_flow.h b/drivers/net/ethernet/intel/ice/ice_flow.h index d92dcc791ef4..612ea3be21a9 100644 --- a/drivers/net/ethernet/intel/ice/ice_flow.h +++ b/drivers/net/ethernet/intel/ice/ice_flow.h @@ -58,6 +58,12 @@ enum ice_flow_field { ICE_FLOW_FIELD_IDX_C_VLAN, ICE_FLOW_FIELD_IDX_ETH_TYPE, /* L3 */ + ICE_FLOW_FIELD_IDX_IPV4_DSCP, + ICE_FLOW_FIELD_IDX_IPV6_DSCP, + ICE_FLOW_FIELD_IDX_IPV4_TTL, + ICE_FLOW_FIELD_IDX_IPV4_PROT, + ICE_FLOW_FIELD_IDX_IPV6_TTL, + ICE_FLOW_FIELD_IDX_IPV6_PROT, ICE_FLOW_FIELD_IDX_IPV4_SA, ICE_FLOW_FIELD_IDX_IPV4_DA, ICE_FLOW_FIELD_IDX_IPV6_SA, @@ -158,6 +164,7 @@ struct ice_flow_seg_xtrct { u16 off; /* Starting offset of the field in header in bytes */ u8 idx; /* Index of FV entry used */ u8 disp; /* Displacement of field in bits fr. FV entry's start */ + u16 mask; /* Mask for field */ }; enum ice_flow_fld_match_type { |