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| author | Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> | 2024-02-09 22:24:32 +0100 |
|---|---|---|
| committer | Tony Nguyen <anthony.l.nguyen@intel.com> | 2024-02-20 10:26:24 -0800 |
| commit | ee89921da471edcb4b1e67f5bbfedddf39749782 (patch) | |
| tree | a7924a90c4d270ea9bd0608727919e56a7f118f5 /drivers/net/ethernet/intel/ice/ice_dpll.c | |
| parent | 9a8385fe14bcb250a3889e744dc54e9c411d8400 (diff) | |
| download | linux-ee89921da471edcb4b1e67f5bbfedddf39749782.tar.gz linux-ee89921da471edcb4b1e67f5bbfedddf39749782.tar.bz2 linux-ee89921da471edcb4b1e67f5bbfedddf39749782.zip | |
ice: fix pin phase adjust updates on PF reset
Do not allow to set phase adjust value for a pin if PF reset is in
progress, this would cause confusing netlink extack errors as the firmware
cannot process the request properly during the reset time.
Return (-EBUSY) and report extack error for the user who tries configure
pin phase adjust during the reset time.
Test by looping execution of below steps until netlink error appears:
- perform PF reset
$ echo 1 > /sys/class/net/<ice PF>/device/reset
- change pin phase adjust value:
$ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \
--do pin-set --json '{"id":0, "phase-adjust":1000}'
Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks")
Reviewed-by: Igor Bagnucki <igor.bagnucki@intel.com>
Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ice/ice_dpll.c')
| -rw-r--r-- | drivers/net/ethernet/intel/ice/ice_dpll.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c index 395e10c246f7..adfa1f2a80a6 100644 --- a/drivers/net/ethernet/intel/ice/ice_dpll.c +++ b/drivers/net/ethernet/intel/ice/ice_dpll.c @@ -963,6 +963,9 @@ ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, u8 flag, flags_en = 0; int ret; + if (ice_dpll_is_reset(pf, extack)) + return -EBUSY; + mutex_lock(&pf->dplls.lock); switch (type) { case ICE_DPLL_PIN_TYPE_INPUT: |