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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-10-13 21:50:31 +0900 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2017-10-30 11:50:32 +0100 |
| commit | f02cebdfe91a3818d4d71eb96a34fd90c9192c52 (patch) | |
| tree | f205dc74c1af02f14362e79e2bb473a54f8df2af /drivers/mmc/core/core.c | |
| parent | 2f129d39adb37899dec2c872bea0a6d1034f4325 (diff) | |
| download | linux-f02cebdfe91a3818d4d71eb96a34fd90c9192c52.tar.gz linux-f02cebdfe91a3818d4d71eb96a34fd90c9192c52.tar.bz2 linux-f02cebdfe91a3818d4d71eb96a34fd90c9192c52.zip | |
mmc: sdhci-cadence: use bitfield access macros for cleanup
Accessing register fields generally need mask and shift part.
Defining them separately, like SDHCI_CDNS_HRS06_TUNE_{SHIFT,MASK},
is tedious.
Register fields can be always defined by GENMASK (or, BIT if it it
a single bit). They are nicely handled by FIELD_* macros.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/core/core.c')
0 files changed, 0 insertions, 0 deletions