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| author | Ingo Molnar <mingo@kernel.org> | 2015-10-06 17:10:28 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2015-10-06 17:10:28 +0200 |
| commit | 82fc167c392a1700f9adbde639730ee8c8122474 (patch) | |
| tree | 373ab737a040dd21e5f98425e7c82a6cc4a83568 /drivers/irqchip/irq-atmel-aic5.c | |
| parent | e3e72ab80a3fac0b88e07d358a2c75724ccd66b4 (diff) | |
| parent | 049e6dde7e57f0054fdc49102e7ef4830c698b46 (diff) | |
| download | linux-82fc167c392a1700f9adbde639730ee8c8122474.tar.gz linux-82fc167c392a1700f9adbde639730ee8c8122474.tar.bz2 linux-82fc167c392a1700f9adbde639730ee8c8122474.zip | |
Merge tag 'v4.3-rc4' into locking/core, to pick up fixes before applying new changes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'drivers/irqchip/irq-atmel-aic5.c')
| -rw-r--r-- | drivers/irqchip/irq-atmel-aic5.c | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c index 9da9942ac83c..f6d680485bee 100644 --- a/drivers/irqchip/irq-atmel-aic5.c +++ b/drivers/irqchip/irq-atmel-aic5.c @@ -88,28 +88,36 @@ static void aic5_mask(struct irq_data *d) { struct irq_domain *domain = d->domain; struct irq_domain_chip_generic *dgc = domain->gc; - struct irq_chip_generic *gc = dgc->gc[0]; + struct irq_chip_generic *bgc = dgc->gc[0]; + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); - /* Disable interrupt on AIC5 */ - irq_gc_lock(gc); + /* + * Disable interrupt on AIC5. We always take the lock of the + * first irq chip as all chips share the same registers. + */ + irq_gc_lock(bgc); irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR); irq_reg_writel(gc, 1, AT91_AIC5_IDCR); gc->mask_cache &= ~d->mask; - irq_gc_unlock(gc); + irq_gc_unlock(bgc); } static void aic5_unmask(struct irq_data *d) { struct irq_domain *domain = d->domain; struct irq_domain_chip_generic *dgc = domain->gc; - struct irq_chip_generic *gc = dgc->gc[0]; + struct irq_chip_generic *bgc = dgc->gc[0]; + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); - /* Enable interrupt on AIC5 */ - irq_gc_lock(gc); + /* + * Enable interrupt on AIC5. We always take the lock of the + * first irq chip as all chips share the same registers. + */ + irq_gc_lock(bgc); irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR); irq_reg_writel(gc, 1, AT91_AIC5_IECR); gc->mask_cache |= d->mask; - irq_gc_unlock(gc); + irq_gc_unlock(bgc); } static int aic5_retrigger(struct irq_data *d) |