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| author | Tao Zhou <tao.zhou1@amd.com> | 2019-07-23 12:18:39 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-07-31 14:49:52 -0500 |
| commit | 045c02165397c6c2c01ca5b8f68a9b642f4d244f (patch) | |
| tree | 9a55b1a5d3a357ccd35db555a0bd4d33a5f86e76 /drivers/gpu/drm | |
| parent | 5bbfb64a177f36d3d208e39c61ce6df3968df4d4 (diff) | |
| download | linux-045c02165397c6c2c01ca5b8f68a9b642f4d244f.tar.gz linux-045c02165397c6c2c01ca5b8f68a9b642f4d244f.tar.bz2 linux-045c02165397c6c2c01ca5b8f68a9b642f4d244f.zip | |
drm/amdgpu: switch to amdgpu_umc structure
create new amdgpu_umc structure to for more umc
settings in future and switch to the new structure
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Dennis Li <dennis.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8 |
4 files changed, 16 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 61bd7be69a3f..2aa06be83974 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -948,6 +948,9 @@ struct amdgpu_device { /* KFD */ struct amdgpu_kfd_dev kfd; + /* UMC */ + struct amdgpu_umc umc; + /* display related functionality */ struct amdgpu_display_manager dm; @@ -973,7 +976,6 @@ struct amdgpu_device { const struct amdgpu_nbio_funcs *nbio_funcs; const struct amdgpu_df_funcs *df_funcs; - const struct amdgpu_umc_funcs *umc_funcs; /* delayed work_func for deferring clockgating during resume */ struct delayed_work delayed_init_work; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index a6134280b941..5f428a3929bd 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -595,8 +595,8 @@ int amdgpu_ras_error_query(struct amdgpu_device *adev, switch (info->head.block) { case AMDGPU_RAS_BLOCK__UMC: - if (adev->umc_funcs->query_ras_error_count) - adev->umc_funcs->query_ras_error_count(adev, &err_data); + if (adev->umc.funcs->query_ras_error_count) + adev->umc.funcs->query_ras_error_count(adev, &err_data); break; default: break; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h index 1ee1a00e5ac8..f5d6def96414 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h @@ -26,4 +26,10 @@ struct amdgpu_umc_funcs { void *ras_error_status); }; +struct amdgpu_umc { + /* max error count in one ras query call */ + uint32_t max_ras_err_cnt_per_query; + const struct amdgpu_umc_funcs *funcs; +}; + #endif diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index 5282c9489c70..ae685998b282 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c @@ -247,8 +247,8 @@ static int gmc_v9_0_process_ras_data_cb(struct amdgpu_device *adev, { struct ras_err_data err_data = {0, 0}; kgd2kfd_set_sram_ecc_flag(adev->kfd.dev); - if (adev->umc_funcs->query_ras_error_count) - adev->umc_funcs->query_ras_error_count(adev, &err_data); + if (adev->umc.funcs->query_ras_error_count) + adev->umc.funcs->query_ras_error_count(adev, &err_data); amdgpu_ras_reset_gpu(adev, 0); return AMDGPU_RAS_UE; } @@ -635,7 +635,9 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev) { switch (adev->asic_type) { case CHIP_VEGA20: - adev->umc_funcs = &umc_v6_1_funcs; + adev->umc.max_ras_err_cnt_per_query = + UMC_V6_1_UMC_INSTANCE_NUM * UMC_V6_1_CHANNEL_INSTANCE_NUM; + adev->umc.funcs = &umc_v6_1_funcs; break; default: break; |