diff options
| author | Thomas Zimmermann <tzimmermann@suse.de> | 2022-10-06 11:53:54 +0200 |
|---|---|---|
| committer | Thomas Zimmermann <tzimmermann@suse.de> | 2022-10-07 13:47:28 +0200 |
| commit | 44f29ad9a4d3131afbc616ad15e4bdf4586cf9a0 (patch) | |
| tree | 25847a43e082838c8f6c9b4d921f34af6b6f48b7 /drivers/gpu/drm/udl/udl_proto.h | |
| parent | cb7b995dcb20d1ab16f41498c65d8f395f095896 (diff) | |
| download | linux-44f29ad9a4d3131afbc616ad15e4bdf4586cf9a0.tar.gz linux-44f29ad9a4d3131afbc616ad15e4bdf4586cf9a0.tar.bz2 linux-44f29ad9a4d3131afbc616ad15e4bdf4586cf9a0.zip | |
drm/udl: Add register constants for framebuffer scanout addresses
Add register constants for the framebuffer scanout addresses and
update the related helper functions. No functional changes.
v2:
* extract address bytes with helper macros (Javier)
* fix comments
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221006095355.23579-16-tzimmermann@suse.de
Diffstat (limited to 'drivers/gpu/drm/udl/udl_proto.h')
| -rw-r--r-- | drivers/gpu/drm/udl/udl_proto.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/udl/udl_proto.h b/drivers/gpu/drm/udl/udl_proto.h index 8e7d1a090644..8f143e75e797 100644 --- a/drivers/gpu/drm/udl/udl_proto.h +++ b/drivers/gpu/drm/udl/udl_proto.h @@ -3,6 +3,8 @@ #ifndef UDL_PROTO_H #define UDL_PROTO_H +#include <linux/bits.h> + /* Color depth */ #define UDL_REG_COLORDEPTH 0x00 #define UDL_COLORDEPTH_16BPP 0 @@ -31,6 +33,18 @@ #define UDL_BLANKMODE_HSYNC_OFF 0x05 /* hsync off, blanked */ #define UDL_BLANKMODE_POWERDOWN 0x07 /* powered off; requires modeset */ +/* Framebuffer address */ +#define UDL_REG_BASE16BPP_ADDR2 0x20 +#define UDL_REG_BASE16BPP_ADDR1 0x21 +#define UDL_REG_BASE16BPP_ADDR0 0x22 +#define UDL_REG_BASE8BPP_ADDR2 0x26 +#define UDL_REG_BASE8BPP_ADDR1 0x27 +#define UDL_REG_BASE8BPP_ADDR0 0x28 + +#define UDL_BASE_ADDR0_MASK GENMASK(7, 0) +#define UDL_BASE_ADDR1_MASK GENMASK(15, 8) +#define UDL_BASE_ADDR2_MASK GENMASK(23, 16) + /* Lock/unlock video registers */ #define UDL_REG_VIDREG 0xff #define UDL_VIDREG_LOCK 0x00 |