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author | Thomas Zimmermann <tzimmermann@suse.de> | 2023-10-11 09:50:59 +0200 |
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committer | Thomas Zimmermann <tzimmermann@suse.de> | 2023-10-11 09:50:59 +0200 |
commit | 57390019b68b83f96eb98f490367b9df1f2d77cb (patch) | |
tree | e6d4b6c75efdd2d7fb7d37f980688c491be3ff6a /drivers/gpu/drm/msm/msm_mdss.c | |
parent | e5f9d543419c78ac58f3b3557bc5a76b20ff600b (diff) | |
parent | 389af786f92ecdff35883551d54bf4e507ffcccb (diff) | |
download | linux-57390019b68b83f96eb98f490367b9df1f2d77cb.tar.gz linux-57390019b68b83f96eb98f490367b9df1f2d77cb.tar.bz2 linux-57390019b68b83f96eb98f490367b9df1f2d77cb.zip |
Merge drm/drm-next into drm-misc-next
Updating drm-misc-next to the state of Linux v6.6-rc2.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_mdss.c')
-rw-r--r-- | drivers/gpu/drm/msm/msm_mdss.c | 99 |
1 files changed, 67 insertions, 32 deletions
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index 268fb3d490de..a429b704059e 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -15,7 +15,7 @@ #include <linux/pm_runtime.h> #include <linux/reset.h> -#include "msm_drv.h" +#include "msm_mdss.h" #include "msm_kms.h" #define HW_REV 0x0 @@ -28,16 +28,6 @@ #define MIN_IB_BW 400000000UL /* Min ib vote 400MB */ -struct msm_mdss_data { - u32 ubwc_version; - /* can be read from register 0x58 */ - u32 ubwc_dec_version; - u32 ubwc_swizzle; - u32 ubwc_static; - u32 highest_bank_bit; - u32 macrotile_mode; -}; - struct msm_mdss { struct device *dev; @@ -187,11 +177,6 @@ static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss) return 0; } -#define UBWC_1_0 0x10000000 -#define UBWC_2_0 0x20000000 -#define UBWC_3_0 0x30000000 -#define UBWC_4_0 0x40000000 - static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss) { const struct msm_mdss_data *data = msm_mdss->mdss_data; @@ -206,10 +191,10 @@ static void msm_mdss_setup_ubwc_dec_30(struct msm_mdss *msm_mdss) (data->highest_bank_bit & 0x3) << 4 | (data->macrotile_mode & 0x1) << 12; - if (data->ubwc_version == UBWC_3_0) + if (data->ubwc_enc_version == UBWC_3_0) value |= BIT(10); - if (data->ubwc_version == UBWC_1_0) + if (data->ubwc_enc_version == UBWC_1_0) value |= BIT(8); writel_relaxed(value, msm_mdss->mmio + UBWC_STATIC); @@ -225,15 +210,30 @@ static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss) writel_relaxed(value, msm_mdss->mmio + UBWC_STATIC); - if (data->ubwc_version == UBWC_3_0) { + if (data->ubwc_enc_version == UBWC_3_0) { writel_relaxed(1, msm_mdss->mmio + UBWC_CTRL_2); writel_relaxed(0, msm_mdss->mmio + UBWC_PREDICTION_MODE); } else { - writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2); + if (data->ubwc_dec_version == UBWC_4_3) + writel_relaxed(3, msm_mdss->mmio + UBWC_CTRL_2); + else + writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2); writel_relaxed(1, msm_mdss->mmio + UBWC_PREDICTION_MODE); } } +const struct msm_mdss_data *msm_mdss_get_mdss_data(struct device *dev) +{ + struct msm_mdss *mdss; + + if (!dev) + return ERR_PTR(-EINVAL); + + mdss = dev_get_drvdata(dev); + + return mdss->mdss_data; +} + static int msm_mdss_enable(struct msm_mdss *msm_mdss) { int ret; @@ -266,6 +266,10 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss) * UBWC_n and the rest of params comes from hw data. */ switch (msm_mdss->mdss_data->ubwc_dec_version) { + case 0: /* no UBWC */ + case UBWC_1_0: + /* do nothing */ + break; case UBWC_2_0: msm_mdss_setup_ubwc_dec_20(msm_mdss); break; @@ -273,6 +277,7 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss) msm_mdss_setup_ubwc_dec_30(msm_mdss); break; case UBWC_4_0: + case UBWC_4_3: msm_mdss_setup_ubwc_dec_40(msm_mdss); break; default: @@ -501,14 +506,26 @@ static void mdss_remove(struct platform_device *pdev) msm_mdss_destroy(mdss); } +static const struct msm_mdss_data msm8998_data = { + .ubwc_enc_version = UBWC_1_0, + .ubwc_dec_version = UBWC_1_0, + .highest_bank_bit = 1, +}; + +static const struct msm_mdss_data qcm2290_data = { + /* no UBWC */ + .highest_bank_bit = 0x2, +}; + static const struct msm_mdss_data sc7180_data = { - .ubwc_version = UBWC_2_0, + .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, .ubwc_static = 0x1e, + .highest_bank_bit = 0x3, }; static const struct msm_mdss_data sc7280_data = { - .ubwc_version = UBWC_3_0, + .ubwc_enc_version = UBWC_3_0, .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = 6, .ubwc_static = 1, @@ -517,14 +534,14 @@ static const struct msm_mdss_data sc7280_data = { }; static const struct msm_mdss_data sc8180x_data = { - .ubwc_version = UBWC_3_0, + .ubwc_enc_version = UBWC_3_0, .ubwc_dec_version = UBWC_3_0, .highest_bank_bit = 3, .macrotile_mode = 1, }; static const struct msm_mdss_data sc8280xp_data = { - .ubwc_version = UBWC_4_0, + .ubwc_enc_version = UBWC_4_0, .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = 6, .ubwc_static = 1, @@ -533,13 +550,13 @@ static const struct msm_mdss_data sc8280xp_data = { }; static const struct msm_mdss_data sdm845_data = { - .ubwc_version = UBWC_2_0, + .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, .highest_bank_bit = 2, }; static const struct msm_mdss_data sm6350_data = { - .ubwc_version = UBWC_2_0, + .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = 6, .ubwc_static = 0x1e, @@ -547,20 +564,28 @@ static const struct msm_mdss_data sm6350_data = { }; static const struct msm_mdss_data sm8150_data = { - .ubwc_version = UBWC_3_0, + .ubwc_enc_version = UBWC_3_0, .ubwc_dec_version = UBWC_3_0, .highest_bank_bit = 2, }; static const struct msm_mdss_data sm6115_data = { - .ubwc_version = UBWC_1_0, + .ubwc_enc_version = UBWC_1_0, .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = 7, .ubwc_static = 0x11f, + .highest_bank_bit = 0x1, +}; + +static const struct msm_mdss_data sm6125_data = { + .ubwc_enc_version = UBWC_1_0, + .ubwc_dec_version = UBWC_3_0, + .ubwc_swizzle = 1, + .highest_bank_bit = 1, }; static const struct msm_mdss_data sm8250_data = { - .ubwc_version = UBWC_4_0, + .ubwc_enc_version = UBWC_4_0, .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = 6, .ubwc_static = 1, @@ -569,23 +594,33 @@ static const struct msm_mdss_data sm8250_data = { .macrotile_mode = 1, }; +static const struct msm_mdss_data sm8550_data = { + .ubwc_enc_version = UBWC_4_0, + .ubwc_dec_version = UBWC_4_3, + .ubwc_swizzle = 6, + .ubwc_static = 1, + /* TODO: highest_bank_bit = 2 for LP_DDR4 */ + .highest_bank_bit = 3, + .macrotile_mode = 1, +}; static const struct of_device_id mdss_dt_match[] = { { .compatible = "qcom,mdss" }, - { .compatible = "qcom,msm8998-mdss" }, - { .compatible = "qcom,qcm2290-mdss" }, + { .compatible = "qcom,msm8998-mdss", .data = &msm8998_data }, + { .compatible = "qcom,qcm2290-mdss", .data = &qcm2290_data }, { .compatible = "qcom,sdm845-mdss", .data = &sdm845_data }, { .compatible = "qcom,sc7180-mdss", .data = &sc7180_data }, { .compatible = "qcom,sc7280-mdss", .data = &sc7280_data }, { .compatible = "qcom,sc8180x-mdss", .data = &sc8180x_data }, { .compatible = "qcom,sc8280xp-mdss", .data = &sc8280xp_data }, { .compatible = "qcom,sm6115-mdss", .data = &sm6115_data }, + { .compatible = "qcom,sm6125-mdss", .data = &sm6125_data }, { .compatible = "qcom,sm6350-mdss", .data = &sm6350_data }, { .compatible = "qcom,sm6375-mdss", .data = &sm6350_data }, { .compatible = "qcom,sm8150-mdss", .data = &sm8150_data }, { .compatible = "qcom,sm8250-mdss", .data = &sm8250_data }, { .compatible = "qcom,sm8350-mdss", .data = &sm8250_data }, { .compatible = "qcom,sm8450-mdss", .data = &sm8250_data }, - { .compatible = "qcom,sm8550-mdss", .data = &sm8250_data }, + { .compatible = "qcom,sm8550-mdss", .data = &sm8550_data }, {} }; MODULE_DEVICE_TABLE(of, mdss_dt_match); |