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| author | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2022-12-08 12:05:21 -0800 |
|---|---|---|
| committer | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2022-12-09 08:28:48 -0800 |
| commit | e6d6e9d0b83d49c330f89ee8d3d1728a930c933e (patch) | |
| tree | 1c6843c8357fb63ae6094271a08d0fd99f56ddca /drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | |
| parent | 6b7cbdbe20b33943b86cb8d752ade6841e83fc42 (diff) | |
| download | linux-e6d6e9d0b83d49c330f89ee8d3d1728a930c933e.tar.gz linux-e6d6e9d0b83d49c330f89ee8d3d1728a930c933e.tar.bz2 linux-e6d6e9d0b83d49c330f89ee8d3d1728a930c933e.zip | |
drm/i915/mtl: MTL has one GSC CS on the media GT
Now that we have the GSC FW support code as a user to the GSC CS, we
can add the relevant flag to the engine mask. Note that the engine will
still be disabled until we define the GSC FW binary file.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221208200521.2928378-7-daniele.ceraolospurio@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/pxp/intel_pxp_irq.c')
0 files changed, 0 insertions, 0 deletions