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| author | Jani Nikula <jani.nikula@intel.com> | 2024-06-04 18:25:26 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2024-06-07 11:13:17 +0300 |
| commit | 9cacbd237f51a9646da04c0cba08d542069b73b0 (patch) | |
| tree | ead8867738e7200aaa8bea327b8c7cd858573bc2 /drivers/gpu/drm/i915/intel_gvt_mmio_table.c | |
| parent | 45f1039335861705bdbf71aff4d890a692662980 (diff) | |
| download | linux-9cacbd237f51a9646da04c0cba08d542069b73b0.tar.gz linux-9cacbd237f51a9646da04c0cba08d542069b73b0.tar.bz2 linux-9cacbd237f51a9646da04c0cba08d542069b73b0.zip | |
drm/i915: pass dev_priv explicitly to TRANS_VSYNC
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the TRANS_VSYNC register macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/eed30cb59cc45955a88cdf951023b0e695095760.1717514638.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_gvt_mmio_table.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c index baeedcdfdcab..e618a16eafac 100644 --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c @@ -236,7 +236,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_A)); MMIO_D(TRANS_VTOTAL(dev_priv, TRANSCODER_A)); MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_A)); - MMIO_D(TRANS_VSYNC(TRANSCODER_A)); + MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_A)); MMIO_D(BCLRPAT(TRANSCODER_A)); MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_A)); MMIO_D(PIPESRC(TRANSCODER_A)); @@ -245,7 +245,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_B)); MMIO_D(TRANS_VTOTAL(dev_priv, TRANSCODER_B)); MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_B)); - MMIO_D(TRANS_VSYNC(TRANSCODER_B)); + MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_B)); MMIO_D(BCLRPAT(TRANSCODER_B)); MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_B)); MMIO_D(PIPESRC(TRANSCODER_B)); @@ -254,7 +254,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_C)); MMIO_D(TRANS_VTOTAL(dev_priv, TRANSCODER_C)); MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_C)); - MMIO_D(TRANS_VSYNC(TRANSCODER_C)); + MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_C)); MMIO_D(BCLRPAT(TRANSCODER_C)); MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_C)); MMIO_D(PIPESRC(TRANSCODER_C)); @@ -263,7 +263,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_EDP)); MMIO_D(TRANS_VTOTAL(dev_priv, TRANSCODER_EDP)); MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_EDP)); - MMIO_D(TRANS_VSYNC(TRANSCODER_EDP)); + MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_EDP)); MMIO_D(BCLRPAT(TRANSCODER_EDP)); MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_EDP)); MMIO_D(PIPE_DATA_M1(TRANSCODER_A)); |