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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-01-25 12:00:05 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-01-25 12:53:15 +0000 |
| commit | 832a67bdb205765109d37fdfff4a97479b03b19b (patch) | |
| tree | 0b9c4501c9c2a37d715e97848c83d1ad11638f91 /drivers/gpu/drm/i915/intel_gpu_commands.h | |
| parent | 9fa4973e91be3e5cb220f7d607c21bf6e82c52d1 (diff) | |
| download | linux-832a67bdb205765109d37fdfff4a97479b03b19b.tar.gz linux-832a67bdb205765109d37fdfff4a97479b03b19b.tar.bz2 linux-832a67bdb205765109d37fdfff4a97479b03b19b.zip | |
drm/i915: Compute the HWS offsets explicitly
Simplify by using sizeof(u32) to convert from the index inside the HWSP
to the byte offset. This has the advantage of not only being shorter
(and so not upsetting checkpatch!) but that it matches use where we are
writing to byte addresses using other commands than MI_STORE_DWORD_IMM.
v2: Drop the now superfluous MI_STORE_DWORD_INDEX_SHIFT, it appears to
be a local invention so keeping it after the final use does not help to
clarify the GPU instruction.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190125120005.25191-2-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_gpu_commands.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_gpu_commands.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_gpu_commands.h b/drivers/gpu/drm/i915/intel_gpu_commands.h index 105e2a9e874a..b96a31bc1080 100644 --- a/drivers/gpu/drm/i915/intel_gpu_commands.h +++ b/drivers/gpu/drm/i915/intel_gpu_commands.h @@ -112,7 +112,6 @@ #define MI_MEM_VIRTUAL (1 << 22) /* 945,g33,965 */ #define MI_USE_GGTT (1 << 22) /* g4x+ */ #define MI_STORE_DWORD_INDEX MI_INSTR(0x21, 1) -#define MI_STORE_DWORD_INDEX_SHIFT 2 /* * Official intel docs are somewhat sloppy concerning MI_LOAD_REGISTER_IMM: * - Always issue a MI_NOOP _before_ the MI_LOAD_REGISTER_IMM - otherwise hw |