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| author | Vandita Kulkarni <vandita.kulkarni@intel.com> | 2019-05-02 20:41:02 +0530 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2019-05-14 10:36:33 +0300 |
| commit | e3c54da0fe8654e7eb2ffd89d798288f83b46663 (patch) | |
| tree | bd1c73a0ac10b572eba191543eed8241b153c777 /drivers/gpu/drm/i915/intel_cdclk.c | |
| parent | 30bd7efdf678e92bee335d301d9d18e3f0209d3b (diff) | |
| download | linux-e3c54da0fe8654e7eb2ffd89d798288f83b46663.tar.gz linux-e3c54da0fe8654e7eb2ffd89d798288f83b46663.tar.bz2 linux-e3c54da0fe8654e7eb2ffd89d798288f83b46663.zip | |
drm/i915: Fix pixel clock and crtc clock config mismatch
In case of dual link mode, the mode clock that we get
from the VBT is halved.
v2: Simplify the calculation (Jani).
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1556809862-31203-4-git-send-email-vandita.kulkarni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_cdclk.c')
0 files changed, 0 insertions, 0 deletions