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| author | Jouni Högander <jouni.hogander@intel.com> | 2023-09-01 12:34:58 +0300 |
|---|---|---|
| committer | Jouni Högander <jouni.hogander@intel.com> | 2023-09-04 12:03:40 +0300 |
| commit | 35a97f56d6ccf1870e666fb6efa12a7ec201b9e4 (patch) | |
| tree | c35e7557ace3282591a71b877e37f46a34a52d65 /drivers/gpu/drm/i915/display/intel_psr.c | |
| parent | 4f89df198dc17070831af21b74e69ee17352619f (diff) | |
| download | linux-35a97f56d6ccf1870e666fb6efa12a7ec201b9e4.tar.gz linux-35a97f56d6ccf1870e666fb6efa12a7ec201b9e4.tar.bz2 linux-35a97f56d6ccf1870e666fb6efa12a7ec201b9e4.zip | |
drm/i915/psr: Clear frontbuffer busy bits on flip
We are planning to move flush performed from work queue. This
means it is possible to have invalidate -> flip -> flush sequence.
Handle this by clearing possible busy bits on flip.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230901093500.3463046-3-jouni.hogander@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_psr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_psr.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 79e57a5e1738..b9e38acc5132 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2230,6 +2230,12 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state, if (crtc_state->crc_enabled && psr->enabled) psr_force_hw_tracking_exit(intel_dp); + /* + * Clear possible busy bits in case we have + * invalidate -> flip -> flush sequence. + */ + intel_dp->psr.busy_frontbuffer_bits = 0; + mutex_unlock(&psr->lock); } } |