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| author | Matthew Auld <matthew.auld@intel.com> | 2021-10-18 18:45:05 +0100 |
|---|---|---|
| committer | Matthew Auld <matthew.auld@intel.com> | 2021-10-20 16:50:22 +0100 |
| commit | d70af57944a1593f2cd6f94b7eb29fae97929953 (patch) | |
| tree | c348cbf34436bd7777b4fedca5e9db36eb4527dc /drivers/gpu/drm/i915/display/intel_panel.c | |
| parent | 63430347713a5ba48617687cc8b2aa1f01514432 (diff) | |
| download | linux-d70af57944a1593f2cd6f94b7eb29fae97929953.tar.gz linux-d70af57944a1593f2cd6f94b7eb29fae97929953.tar.bz2 linux-d70af57944a1593f2cd6f94b7eb29fae97929953.zip | |
drm/i915/shmem: ensure flush during swap-in on non-LLC
On non-LLC platforms, force the flush-on-acquire if this is ever
swapped-in. Our async flush path is not trust worthy enough yet(and
happens in the wrong order), and with some tricks it's conceivable for
userspace to change the cache-level to I915_CACHE_NONE after the pages
are swapped-in, and since execbuf binds the object before doing the
async flush, there is a potential race window.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-6-matthew.auld@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_panel.c')
0 files changed, 0 insertions, 0 deletions