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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-18 09:35:04 +0000 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2019-12-23 14:25:27 +0200 |
| commit | d39da686c2f3b8518b6933951d53891aa83227d6 (patch) | |
| tree | 6cda9f626ce88ab83b01f54093d955e32ad6f466 /drivers/gpu/drm/i915/display/intel_frontbuffer.h | |
| parent | 74ac57806af124b57af30f2ca9fc9df0afe6269e (diff) | |
| download | linux-d39da686c2f3b8518b6933951d53891aa83227d6.tar.gz linux-d39da686c2f3b8518b6933951d53891aa83227d6.tar.bz2 linux-d39da686c2f3b8518b6933951d53891aa83227d6.zip | |
drm/i915/gt: Ratelimit display power w/a
For very light workloads that frequently park, acquiring the display
power well (required to prevent the dmc from trashing the system) takes
longer than the execution. A good example is the igt_coherency selftest,
which is slowed down by an order of magnitude in the worst case with
powerwell cycling. To prevent frequent cycling, while keeping our fast
soft-rc6, use a timer to delay release of the display powerwell.
Fixes: 311770173fac ("drm/i915/gt: Schedule request retirement when timeline idles")
References: https://gitlab.freedesktop.org/drm/intel/issues/848
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191218093504.3477048-1-chris@chris-wilson.co.uk
(cherry picked from commit 81ff52b705775433a955b2746d37b87bdc89a3d0)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_frontbuffer.h')
0 files changed, 0 insertions, 0 deletions