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author | José Roberto de Souza <jose.souza@intel.com> | 2021-09-29 17:14:01 -0700 |
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committer | José Roberto de Souza <jose.souza@intel.com> | 2021-09-30 14:47:30 -0700 |
commit | ac220f5f754b1d2f4a69428f515c3f1b10d1fad0 (patch) | |
tree | 0f983e0fcd2710c59fa8acc267b14766dc5bfc76 /drivers/gpu/drm/i915/display/intel_frontbuffer.h | |
parent | e505d76404b16646a05ba63ce5b14c1b3e2f52af (diff) | |
download | linux-ac220f5f754b1d2f4a69428f515c3f1b10d1fad0.tar.gz linux-ac220f5f754b1d2f4a69428f515c3f1b10d1fad0.tar.bz2 linux-ac220f5f754b1d2f4a69428f515c3f1b10d1fad0.zip |
drm/i915/display/psr: Handle plane and pipe restrictions at every page flip
PSR2 selective is not supported over rotated and scaled planes.
We had the rotation check in intel_psr2_sel_fetch_config_valid()
but that code path is only execute when a modeset is needed and
those plane parameters can change without a modeset.
Pipe selective fetch restrictions are also needed, it could be added
in intel_psr_compute_config() but pippe scaling is computed after
it is executed, so leaving as is for now.
There is no much loss in this approach as it would cause selective
fetch to not enabled as for alderlake-P and newer will cause it to
switch to PSR1 that will have the same power-savings as do full pipe
fetch.
Also need to check those restricions in the second
for_each_oldnew_intel_plane_in_state() loop because the state could
only have a plane that is not affected by those restricitons but
the damaged area intersect with planes that has those restrictions,
so a full pipe fetch is required.
v2:
- also handling pipe restrictions
BSpec: 55229
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> # v1
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210930001409.254817-1-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_frontbuffer.h')
0 files changed, 0 insertions, 0 deletions