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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-10-12 15:35:22 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-10-31 08:28:49 +0200 |
| commit | 7880d41c55f1e177a88c275d2e3ccec4debfcb51 (patch) | |
| tree | 51b9e7cf49799f2af9460a678c6ba6062a9573d7 /drivers/gpu/drm/i915/display/intel_dpll_mgr.c | |
| parent | 3e7e07c4cf638b281f420be77afef7d93481a212 (diff) | |
| download | linux-7880d41c55f1e177a88c275d2e3ccec4debfcb51.tar.gz linux-7880d41c55f1e177a88c275d2e3ccec4debfcb51.tar.bz2 linux-7880d41c55f1e177a88c275d2e3ccec4debfcb51.zip | |
drm/i915: Extract _intel_{enable,disable}_shared_dpll()
We have a bit of duplicated code around the DPLL disabling. Extract
that to a new function, and for symmetry also do the same for the
enable direction.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231012123522.26045-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dpll_mgr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 37 |
1 files changed, 23 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index 556b10eefe66..7958d0bd851e 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -219,6 +219,26 @@ intel_tc_pll_enable_reg(struct drm_i915_private *i915, return MG_PLL_ENABLE(tc_port); } +static void _intel_enable_shared_dpll(struct drm_i915_private *i915, + struct intel_shared_dpll *pll) +{ + if (pll->info->power_domain) + pll->wakeref = intel_display_power_get(i915, pll->info->power_domain); + + pll->info->funcs->enable(i915, pll); + pll->on = true; +} + +static void _intel_disable_shared_dpll(struct drm_i915_private *i915, + struct intel_shared_dpll *pll) +{ + pll->info->funcs->disable(i915, pll); + pll->on = false; + + if (pll->info->power_domain) + intel_display_power_put(i915, pll->info->power_domain, pll->wakeref); +} + /** * intel_enable_shared_dpll - enable a CRTC's shared DPLL * @crtc_state: CRTC, and its state, which has a shared DPLL @@ -259,11 +279,7 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state) drm_dbg_kms(&i915->drm, "enabling %s\n", pll->info->name); - if (pll->info->power_domain) - pll->wakeref = intel_display_power_get(i915, pll->info->power_domain); - - pll->info->funcs->enable(i915, pll); - pll->on = true; + _intel_enable_shared_dpll(i915, pll); out: mutex_unlock(&i915->display.dpll.lock); @@ -308,11 +324,8 @@ void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state) goto out; drm_dbg_kms(&i915->drm, "disabling %s\n", pll->info->name); - pll->info->funcs->disable(i915, pll); - pll->on = false; - if (pll->info->power_domain) - intel_display_power_put(i915, pll->info->power_domain, pll->wakeref); + _intel_disable_shared_dpll(i915, pll); out: mutex_unlock(&i915->display.dpll.lock); @@ -4408,11 +4421,7 @@ static void sanitize_dpll_state(struct drm_i915_private *i915, "%s enabled but not in use, disabling\n", pll->info->name); - pll->info->funcs->disable(i915, pll); - pll->on = false; - - if (pll->info->power_domain) - intel_display_power_put(i915, pll->info->power_domain, pll->wakeref); + _intel_disable_shared_dpll(i915, pll); } void intel_dpll_sanitize_state(struct drm_i915_private *i915) |