diff options
author | Dave Airlie <airlied@redhat.com> | 2021-10-22 05:49:21 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2021-10-22 05:49:42 +1000 |
commit | 94ff371eb8497d02b8cb9d0c2c7370193c98e9f7 (patch) | |
tree | ff115b1a3b67777d8a2f63c7c87f969cc9550995 /drivers/gpu/drm/i915/display/intel_dp_link_training.h | |
parent | 1176d15f0f6e556d54ced510ac4a91694960332b (diff) | |
parent | c974cf01b248c6f4220bfadd57cce74058453aea (diff) | |
download | linux-94ff371eb8497d02b8cb9d0c2c7370193c98e9f7.tar.gz linux-94ff371eb8497d02b8cb9d0c2c7370193c98e9f7.tar.bz2 linux-94ff371eb8497d02b8cb9d0c2c7370193c98e9f7.zip |
Merge tag 'drm-intel-next-2021-10-15' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
UAPI Changes:
- No Functional change, but a clarification around I915_TILING values (Matt).
Driver Changes:
- Changes around async flip VT-d w/a (Ville)
- Delete bogus NULL check in intel_ddi_encoder_destroy (Dan)
- DP link training improvements and DP per-lane driver settings (Ville)
- Free the returned object of acpi_evaluate_dsm (Zenghui)
- Fixes and improvements around DP's UHBR and MST (Jani)
- refactor plane config + pin out (Dave)
- remove unused include in intel_dsi_vbt.c (Lucas)
- some code clean up (Lucas, Jani)
- gracefully disable dual eDP (Jani)
- Remove memory frequency calculation (Jose)
- Fix oops on platforms w/o hpd support (Ville)
- Clean up PXP Kconfig info (Rodrigo)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YWnMORrixyw90O3/@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_link_training.h')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_link_training.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h index 9d24d594368c..6a3a7b37349a 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h @@ -19,6 +19,7 @@ void intel_dp_get_adjust_train(struct intel_dp *intel_dp, const u8 link_status[DP_LINK_STATUS_SIZE]); void intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, + enum drm_dp_phy dp_phy, u8 dp_train_pat); void intel_dp_set_signal_levels(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, |