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| author | Arun R Murthy <arun.r.murthy@intel.com> | 2023-03-02 13:45:31 +0530 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2023-03-21 16:16:56 +0200 |
| commit | 562334d22a05a4793a620a9ef02516f3b8da9ec5 (patch) | |
| tree | f6c8981dc2b6cc402b9e357fc62b747989456c1c /drivers/gpu/drm/i915/display/intel_dp_link_training.c | |
| parent | 0a93eeb5aef26f68ef247576662282a5d42c63d5 (diff) | |
| download | linux-562334d22a05a4793a620a9ef02516f3b8da9ec5.tar.gz linux-562334d22a05a4793a620a9ef02516f3b8da9ec5.tar.bz2 linux-562334d22a05a4793a620a9ef02516f3b8da9ec5.zip | |
drm: Add SDP Error Detection Configuration Register
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230302081532.765821-2-arun.r.murthy@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_link_training.c')
0 files changed, 0 insertions, 0 deletions