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| author | Jani Nikula <jani.nikula@intel.com> | 2024-04-30 13:09:58 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2024-05-06 10:25:23 +0300 |
| commit | 7a7a4c4eeba4a546f3be6d33b6d9f37a0c3e4a3d (patch) | |
| tree | c8bbc4651f342a4d581e1a9788a5bd55e31fec74 /drivers/gpu/drm/i915/display/intel_display_irq.c | |
| parent | f9f8f8471785e1f312db59d1d14304fa333754f6 (diff) | |
| download | linux-7a7a4c4eeba4a546f3be6d33b6d9f37a0c3e4a3d.tar.gz linux-7a7a4c4eeba4a546f3be6d33b6d9f37a0c3e4a3d.tar.bz2 linux-7a7a4c4eeba4a546f3be6d33b6d9f37a0c3e4a3d.zip | |
drm/i915: pass dev_priv explicitly to TRANS_PSR_IIR
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the TRANS_PSR_IIR register macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/3a03109d11e7f55a456c3e5ef28d3ffa69582d3d.1714471597.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display_irq.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display_irq.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c index a9bcf249e925..c41f058acaff 100644 --- a/drivers/gpu/drm/i915/display/intel_display_irq.c +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c @@ -876,7 +876,8 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir) struct intel_dp *intel_dp = enc_to_intel_dp(encoder); if (DISPLAY_VER(dev_priv) >= 12) - iir_reg = TRANS_PSR_IIR(intel_dp->psr.transcoder); + iir_reg = TRANS_PSR_IIR(dev_priv, + intel_dp->psr.transcoder); else iir_reg = EDP_PSR_IIR; @@ -1458,7 +1459,9 @@ void gen11_display_irq_reset(struct drm_i915_private *dev_priv) intel_uncore_write(uncore, TRANS_PSR_IMR(dev_priv, trans), 0xffffffff); - intel_uncore_write(uncore, TRANS_PSR_IIR(trans), 0xffffffff); + intel_uncore_write(uncore, + TRANS_PSR_IIR(dev_priv, trans), + 0xffffffff); } } else { intel_uncore_write(uncore, EDP_PSR_IMR, 0xffffffff); @@ -1690,7 +1693,8 @@ void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) if (!intel_display_power_is_enabled(dev_priv, domain)) continue; - gen3_assert_iir_is_zero(uncore, TRANS_PSR_IIR(trans)); + gen3_assert_iir_is_zero(uncore, + TRANS_PSR_IIR(dev_priv, trans)); } } else { gen3_assert_iir_is_zero(uncore, EDP_PSR_IIR); |