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author | Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> | 2021-06-15 16:26:13 +0530 |
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committer | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2021-06-16 14:53:18 +0200 |
commit | 544021e3f2aa3c4c6c5aabc58907e8bab69b3762 (patch) | |
tree | 67c98021a91926a7231b2f01a652e8b02da17397 /drivers/gpu/drm/i915/display/intel_ddi.c | |
parent | b91e3c830f00814c0f5c2e3afaf63b48d8ccb9d3 (diff) | |
download | linux-544021e3f2aa3c4c6c5aabc58907e8bab69b3762.tar.gz linux-544021e3f2aa3c4c6c5aabc58907e8bab69b3762.tar.bz2 linux-544021e3f2aa3c4c6c5aabc58907e8bab69b3762.zip |
drm/i915/jsl: Add W/A 1409054076 for JSL
When pipe A is disabled and MIPI DSI is enabled on pipe B,
the AMT KVMR feature will incorrectly see pipe A as enabled.
Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
it set while DSI is enabled on pipe B. No impact to setting
it all the time.
Changes since V5:
- Added reviewed-by
- Removed redundant braces and debug message format - Imre
Changes since V4:
- Modified function comment Wa_<number>:icl,jsl,ehl - Lucas
- Modified debug message in sync state - Imre
Changes since V3:
- More meaningful name to workaround - Imre
- Remove boolean check clear flag
- Add WA_verify hook in dsi sync_state
Changes since V2:
- Used REG_BIT, ignored pipe A and used sw state check - Jani
- Made function wrapper - Jani
Changes since V1:
- ./dim checkpatch errors addressed
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210615105613.851491-1-tejaskumarx.surendrakumar.upadhyay@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_ddi.c')
0 files changed, 0 insertions, 0 deletions