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| author | Maxime Ripard <mripard@kernel.org> | 2024-01-22 09:44:15 +0100 |
|---|---|---|
| committer | Maxime Ripard <mripard@kernel.org> | 2024-01-22 09:44:15 +0100 |
| commit | cf79f291f985662150363b4a93d16f88f12643bc (patch) | |
| tree | a803f6e9b1e34f100783538955b9ce34628cd5dd /drivers/gpu/drm/amd/display/modules/freesync/freesync.c | |
| parent | a20f1b02bafcbf5a32d96a1d4185d6981cf7d016 (diff) | |
| parent | 6613476e225e090cc9aad49be7fa504e290dd33d (diff) | |
| download | linux-cf79f291f985662150363b4a93d16f88f12643bc.tar.gz linux-cf79f291f985662150363b4a93d16f88f12643bc.tar.bz2 linux-cf79f291f985662150363b4a93d16f88f12643bc.zip | |
Merge v6.8-rc1 into drm-misc-fixes
Let's kickstart the 6.8 fix cycle.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/freesync/freesync.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c index ccecddafeb05..3955b7e4b2e2 100644 --- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c +++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c @@ -81,6 +81,7 @@ fail_alloc_context: void mod_freesync_destroy(struct mod_freesync *mod_freesync) { struct core_freesync *core_freesync = NULL; + if (mod_freesync == NULL) return; core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); @@ -278,9 +279,8 @@ static void apply_below_the_range(struct core_freesync *core_freesync, } } else if (last_render_time_in_us > (max_render_time_in_us + in_out_vrr->btr.margin_in_us / 2)) { /* Enter Below the Range */ - if (!in_out_vrr->btr.btr_active) { + if (!in_out_vrr->btr.btr_active) in_out_vrr->btr.btr_active = true; - } } /* BTR set to "not active" so disengage */ @@ -693,10 +693,12 @@ static void build_vrr_infopacket_fs2_data(enum color_transfer_func app_tf, if (app_tf != TRANSFER_FUNC_UNKNOWN) { infopacket->valid = true; - if (app_tf != TRANSFER_FUNC_PQ2084) { + if (app_tf == TRANSFER_FUNC_PQ2084) + infopacket->sb[9] |= 0x20; // PB9 = [Bit 5 = PQ EOTF Active] + else { infopacket->sb[6] |= 0x08; // PB6 = [Bit 3 = Native Color Active] if (app_tf == TRANSFER_FUNC_GAMMA_22) - infopacket->sb[9] |= 0x04; // PB6 = [Bit 2 = Gamma 2.2 EOTF Active] + infopacket->sb[9] |= 0x04; // PB9 = [Bit 2 = Gamma 2.2 EOTF Active] } } } |