diff options
| author | Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> | 2019-09-25 17:12:10 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-10-25 16:50:08 -0400 |
| commit | 44ce0cd3b5147d12143d2f8bf34b161a72890ebd (patch) | |
| tree | 8b6541f1863da2f110c1f53adaffb4ae2b6979c7 /drivers/gpu/drm/amd/display/dc/inc/hw | |
| parent | e2e316d5d795f86acc02bf92e153551d263c1b82 (diff) | |
| download | linux-44ce0cd3b5147d12143d2f8bf34b161a72890ebd.tar.gz linux-44ce0cd3b5147d12143d2f8bf34b161a72890ebd.tar.bz2 linux-44ce0cd3b5147d12143d2f8bf34b161a72890ebd.zip | |
drm/amd/display: move dispclk vco freq to clk mgr base
This value will be needed by dml and therefore should be externally
accessible.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h | 2 |
2 files changed, 1 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h index f2e21cb9fbd5..da43523a7bfe 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h @@ -149,7 +149,6 @@ struct wm_table { struct clk_bw_params { unsigned int vram_type; unsigned int num_channels; - unsigned int dispclk_vco_khz; struct clk_limit_table clk_table; struct wm_table wm_table; }; @@ -192,6 +191,7 @@ struct clk_mgr { struct dc_clocks clks; bool psr_allow_active_cache; int dprefclk_khz; // Used by program pixel clock in clock source funcs, need to figureout where this goes + int dentist_vco_freq_khz; #ifdef CONFIG_DRM_AMD_DC_DCN2_1 struct clk_bw_params *bw_params; #endif diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h index 2e8cd7956a17..a17a77192690 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h @@ -225,8 +225,6 @@ struct clk_mgr_internal { struct state_dependent_clocks max_clks_by_state[DM_PP_CLOCKS_MAX_STATES]; /*TODO: figure out which of the below fields should be here vs in asic specific portion */ - int dentist_vco_freq_khz; - /* Cache the status of DFS-bypass feature*/ bool dfs_bypass_enabled; /* True if the DFS-bypass feature is enabled and active. */ |