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authorAdam Nelson <adnelson@amd.com>2024-04-09 17:38:44 -0400
committerAlex Deucher <alexander.deucher@amd.com>2024-05-13 15:46:27 -0400
commit9de99fa8c1eab5d7d1f363dcba0786a9b9cc51f4 (patch)
tree4ad2c7714c2140cae285f4fb72bac87c35973e80 /drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
parent3ecb039847dcc3d8d683c8aec94e0901dfff518a (diff)
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drm/amd/display: Fix 3dlut size for Fastloading on DCN401
[WHY] After a non-3dlut test the MPCC_MCM_3DLUT_MODE::MPCC_MCM_3DLUT_SIZE is incorrect. [HOW] Add register write to make valid. Acked-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Adam Nelson <adnelson@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h b/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
index dd786600668f..34cf8efc5cb9 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h
@@ -576,6 +576,7 @@ struct mpc_funcs {
void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, bool lut_bank_a, int mpcc_id);
void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_ID id, const enum MCM_LUT_XABLE xable,
bool lut_bank_a, int mpcc_id);
+ void (*program_3dlut_size)(struct mpc *mpc, bool is_17x17x17, int mpcc_id);
};
#endif