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author | Dillon Varone <Dillon.Varone@amd.com> | 2022-11-08 18:45:33 -0500 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2022-11-23 09:47:14 -0500 |
commit | 6d4727c80947de0e6fad58b196a9d215e3b32608 (patch) | |
tree | c7fdd9e82d8302821a69eb9e11bd9902d72a0b67 /drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | |
parent | 0fc099c02a4eac89b67b2ce2e70e6c2a09a23853 (diff) | |
download | linux-6d4727c80947de0e6fad58b196a9d215e3b32608.tar.gz linux-6d4727c80947de0e6fad58b196a9d215e3b32608.tar.bz2 linux-6d4727c80947de0e6fad58b196a9d215e3b32608.zip |
drm/amd/display: Add check for DET fetch latency hiding for dcn32
[WHY?]
Some configurations are constructed with very marginal DET buffers relative to
the worst possible time required to fetch a swath.
[HOW?]
Add a check to see that the DET buffer allocated for each pipe can hide the
latency for all pipes to fetch at least one swath.
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h')
0 files changed, 0 insertions, 0 deletions