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| author | Daniel Miess <daniel.miess@amd.com> | 2023-06-28 12:39:04 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-07-18 11:14:36 -0400 |
| commit | 3a87e25aaa1bc406fcb4459cfc78642bb070af1a (patch) | |
| tree | 3c75375233e9190d2b22708102c0991a3342be5d /drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h | |
| parent | 2ad127ba4c6e188e7a83513021a638a748ceb557 (diff) | |
| download | linux-3a87e25aaa1bc406fcb4459cfc78642bb070af1a.tar.gz linux-3a87e25aaa1bc406fcb4459cfc78642bb070af1a.tar.bz2 linux-3a87e25aaa1bc406fcb4459cfc78642bb070af1a.zip | |
drm/amd/display: Fix DP2 link training failure with RCO
[Why]
When RCO is enabled for symclk32_le we get failures during
DP2 link traing compliance tests.
[How]
Break out symclk32_le RCO into a separate function that is
called for hpo when link is enabled/disabled.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Daniel Miess <daniel.miess@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h index 8dc804bbe98b..93592281de32 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h @@ -123,6 +123,11 @@ struct dccg_funcs { struct dccg *dccg, int hpo_le_inst); + void (*set_symclk32_le_root_clock_gating)( + struct dccg *dccg, + int hpo_le_inst, + bool enable); + void (*set_physymclk)( struct dccg *dccg, int phy_inst, |