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author | Dave Airlie <airlied@redhat.com> | 2018-11-19 11:07:52 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2018-11-19 11:07:52 +1000 |
commit | 9235dd441af43599b9cdcce599a3da4083fcad3c (patch) | |
tree | 5f8a79cc2d378f05e807c6c5e388394b8e86319d /drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | |
parent | d7563c55ef9fc1fd2301b8708b3c1f53509d6745 (diff) | |
parent | 36b486bc682114a2f1001cbf1a87f21ae381bfc1 (diff) | |
download | linux-9235dd441af43599b9cdcce599a3da4083fcad3c.tar.gz linux-9235dd441af43599b9cdcce599a3da4083fcad3c.tar.bz2 linux-9235dd441af43599b9cdcce599a3da4083fcad3c.zip |
Merge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux into drm-next
New features for 4.21:
amdgpu:
- Support for SDMA paging queue on vega
- Put compute EOP buffers into vram for better performance
- Share more code with amdkfd
- Support for scanout with DCC on gfx9
- Initial kerneldoc for DC
- Updated SMU firmware support for gfx8 chips
- Rework CSA handling for eventual support for preemption
- XGMI PSP support
- Clean up RLC handling
- Enable GPU reset by default on VI, SOC15 dGPUs
- Ring and IB test cleanups
amdkfd:
- Share more code with amdgpu
ttm:
- Move global init out of the drivers
scheduler:
- Track if schedulers are ready for work
- Timeout/fault handling changes to facilitate GPU recovery
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181114165113.3751-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h new file mode 100644 index 000000000000..23a4b18e5fee --- /dev/null +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h @@ -0,0 +1,47 @@ +/* + * Copyright 2012-16 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#ifndef __DAL_CLK_MGR_H__ +#define __DAL_CLK_MGR_H__ + +#include "dm_services_types.h" +#include "dc.h" + +struct clk_mgr { + struct dc_context *ctx; + const struct clk_mgr_funcs *funcs; + + struct dc_clocks clks; +}; + +struct clk_mgr_funcs { + void (*update_clocks)(struct clk_mgr *clk_mgr, + struct dc_state *context, + bool safe_to_lower); + + int (*get_dp_ref_clk_frequency)(struct clk_mgr *clk_mgr); +}; + +#endif /* __DAL_CLK_MGR_H__ */ |