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| author | Dave Airlie <airlied@redhat.com> | 2021-06-10 13:47:12 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2021-06-10 13:47:13 +1000 |
| commit | c707b73f0cfb1acc94a20389aecde65e6385349b (patch) | |
| tree | be2d0069c38a87c4f2e6c4d3e7097d5ee672a3bb /drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h | |
| parent | a2098e857b765bd39a9c67c81448f60d5c475846 (diff) | |
| parent | 2c1b1ac7084edf477309d27c02d9da7f79b33cec (diff) | |
| download | linux-c707b73f0cfb1acc94a20389aecde65e6385349b.tar.gz linux-c707b73f0cfb1acc94a20389aecde65e6385349b.tar.bz2 linux-c707b73f0cfb1acc94a20389aecde65e6385349b.zip | |
Merge tag 'amd-drm-next-5.14-2021-06-09' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.14-2021-06-09:
amdgpu:
- SR-IOV fixes
- Smartshift updates
- GPUVM TLB flush updates
- 16bpc fixed point display fix for DCE11
- BACO cleanups and core refactoring
- Aldebaran updates
- Initial Yellow Carp support
- RAS fixes
- PM API cleanup
- DC visual confirm updates
- DC DP MST fixes
- DC DML fixes
- Misc code cleanups and bug fixes
amdkfd:
- Initial Yellow Carp support
radeon:
- memcpy_to/from_io fixes
UAPI:
- Add Yellow Carp chip family id
Used internally in the kernel driver and by mesa
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610031649.4006-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h index 6ae5df58a4fc..7b7f1500a91e 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h @@ -38,6 +38,10 @@ enum dml_project { DML_PROJECT_NAVI10v2, DML_PROJECT_DCN21, DML_PROJECT_DCN30, +#ifdef CONFIG_DRM_AMD_DC_DCN3_1 + DML_PROJECT_DCN31, + DML_PROJECT_DCN31_FPGA, +#endif }; struct display_mode_lib; |