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| author | Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> | 2019-03-26 13:26:37 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-22 09:34:08 -0500 |
| commit | 0ba37b20ef1c587a24f0f8060f32a4d56f4d65df (patch) | |
| tree | ff637d37bf364a066a3c63f63b4bf8004a6088cd /drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h | |
| parent | 173932dec76fbf9f8e5a75a74ccbffc186ce0a4a (diff) | |
| download | linux-0ba37b20ef1c587a24f0f8060f32a4d56f4d65df.tar.gz linux-0ba37b20ef1c587a24f0f8060f32a4d56f4d65df.tar.bz2 linux-0ba37b20ef1c587a24f0f8060f32a4d56f4d65df.zip | |
drm/amd/display: fix dsc validation
Currently dsc is validated not taking the image width limitation into
mind.
This change addresses that, but due to previous design being limited
to non odm dsc validation additional sequence changes are made.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h index 174c414e0982..e8da21f04454 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h @@ -130,6 +130,7 @@ enum dm_validation_status { DML_FAIL_DIO_SUPPORT, DML_FAIL_NOT_ENOUGH_DSC, DML_FAIL_DSC_CLK_REQUIRED, + DML_FAIL_DSC_VALIDATION_FAILURE, DML_FAIL_URGENT_LATENCY, DML_FAIL_REORDERING_BUFFER, DML_FAIL_DISPCLK_DPPCLK, |