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| author | Harry Wentland <harry.wentland@amd.com> | 2017-05-10 15:56:17 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 18:06:54 -0400 |
| commit | 15a27de250a5e5a2dec7c0bf004db0511353e3f3 (patch) | |
| tree | 3559add4e1a94118bf0dcb02279f4f0a306a0df8 /drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c | |
| parent | 2801b0a84ef66604fed6754d8d7858b45e2a443a (diff) | |
| download | linux-15a27de250a5e5a2dec7c0bf004db0511353e3f3.tar.gz linux-15a27de250a5e5a2dec7c0bf004db0511353e3f3.tar.bz2 linux-15a27de250a5e5a2dec7c0bf004db0511353e3f3.zip | |
drm/amd/display: Don't call PSR func if DMCU is off
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c index 6e56d8308d66..8bc0d0ff3a2e 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c @@ -29,11 +29,15 @@ #include "fixed32_32.h" #include "bios_parser_interface.h" #include "dc.h" +#include "core_dc.h" +#include "dce_abm.h" #if defined(CONFIG_DRM_AMD_DC_DCN1_0) #include "dcn_calcs.h" #include "core_dc.h" #endif + + #define TO_DCE_CLOCKS(clocks)\ container_of(clocks, struct dce_disp_clk, base) @@ -374,6 +378,8 @@ static void dce112_set_clock( struct dce_disp_clk *clk_dce = TO_DCE_CLOCKS(clk); struct bp_set_dce_clock_parameters dce_clk_params; struct dc_bios *bp = clk->ctx->dc_bios; + struct core_dc *core_dc = DC_TO_CORE(clk->ctx->dc); + struct abm *abm = core_dc->res_pool->abm; /* Prepare to program display clock*/ memset(&dce_clk_params, 0, sizeof(dce_clk_params)); @@ -404,9 +410,8 @@ static void dce112_set_clock( bp->funcs->set_dce_clock(bp, &dce_clk_params); -#if defined(CONFIG_DRM_AMD_DC_DCN1_0) - dce_psr_wait_loop(clk_dce, requested_clk_khz); -#endif + if (abm->funcs->is_dmcu_initialized(abm)) + dce_psr_wait_loop(clk_dce, requested_clk_khz); } |