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| author | Roman Li <roman.li@amd.com> | 2022-06-28 18:30:47 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-07-13 20:57:05 -0400 |
| commit | ee7b62e127c8cc6db24f83e5e116357649f6e41f (patch) | |
| tree | 5ed597f6cb4b68c835457591dee89dc11e772bde /drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | |
| parent | 5439c41a80c00e993d18d1cd4407a6a82b35d963 (diff) | |
| download | linux-ee7b62e127c8cc6db24f83e5e116357649f6e41f.tar.gz linux-ee7b62e127c8cc6db24f83e5e116357649f6e41f.tar.bz2 linux-ee7b62e127c8cc6db24f83e5e116357649f6e41f.zip | |
drm/amd/display: Enable DCN314 in DC
Add support for DCN 3.1.4 in Display Core
Signed-off-by: Roman Li <roman.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c index 6972f99e9a9a..4c76091fd1f2 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c @@ -43,11 +43,11 @@ #include "dcn30/dcn30_clk_mgr.h" #include "dcn301/vg_clk_mgr.h" #include "dcn31/dcn31_clk_mgr.h" +#include "dcn314/dcn314_clk_mgr.h" #include "dcn315/dcn315_clk_mgr.h" #include "dcn316/dcn316_clk_mgr.h" #include "dcn32/dcn32_clk_mgr.h" - int clk_mgr_helper_get_active_display_cnt( struct dc *dc, struct dc_state *context) @@ -287,6 +287,7 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p return &clk_mgr->base.base; } break; + case FAMILY_YELLOW_CARP: { struct clk_mgr_dcn31 *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); @@ -335,6 +336,20 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p return &clk_mgr->base; break; } + + case AMDGPU_FAMILY_GC_11_0_2: { + struct clk_mgr_dcn314 *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); + + if (clk_mgr == NULL) { + BREAK_TO_DEBUGGER(); + return NULL; + } + + dcn314_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); + return &clk_mgr->base.base; + } + break; + #endif default: ASSERT(0); /* Unknown Asic */ @@ -381,6 +396,11 @@ void dc_destroy_clk_mgr(struct clk_mgr *clk_mgr_base) case AMDGPU_FAMILY_GC_11_0_0: dcn32_clk_mgr_destroy(clk_mgr); break; + + case AMDGPU_FAMILY_GC_11_0_2: + dcn314_clk_mgr_destroy(clk_mgr); + break; + default: break; } |