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author | Michael Strauss <michael.strauss@amd.com> | 2020-02-13 15:08:13 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-02-25 11:09:12 -0500 |
commit | 41ef3dcd86443fab3f0ba50902d13935bc12d24f (patch) | |
tree | 0276285a63931b7f3b53243b3d1f029fc3bb4090 /drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | |
parent | 9dac88d8792af034d240c2df148b46e0f9ab00ca (diff) | |
download | linux-41ef3dcd86443fab3f0ba50902d13935bc12d24f.tar.gz linux-41ef3dcd86443fab3f0ba50902d13935bc12d24f.tar.bz2 linux-41ef3dcd86443fab3f0ba50902d13935bc12d24f.zip |
drm/amd/display: Fix RV2 Variant Detection
[WHY]
RV2 and variants are indistinguishable by hw internal rev alone, need to
be distinguishable in order to correctly set max vlevel. Previous
detection change incorrectly checked for hw internal rev.
[HOW]
Use pci revision to check if RV2 or low power variant Correct a few
overlapping ASICREV range checks
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Reviewed-by: Michael Strauss <Michael.Strauss@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c index 2f43f1618db8..8ec2dfe45d40 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c @@ -153,13 +153,6 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p #if defined(CONFIG_DRM_AMD_DC_DCN) case FAMILY_RV: - if (ASICREV_IS_DALI(asic_id.hw_internal_rev) || - ASICREV_IS_POLLOCK(asic_id.hw_internal_rev)) { - /* TEMP: this check has to come before ASICREV_IS_RENOIR */ - /* which also incorrectly returns true for Dali/Pollock*/ - rv2_clk_mgr_construct(ctx, clk_mgr, pp_smu); - break; - } if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)) { rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); break; |