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| author | Evan Quan <evan.quan@amd.com> | 2020-09-30 14:20:38 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-10-27 12:01:16 -0400 |
| commit | a2475e624e2e80e65f371d44b712c93a144bfad9 (patch) | |
| tree | 1e360080afbb6136ae09cd741e4f2c4984090034 /drivers/gpu/drm/amd/display/dc/calcs | |
| parent | b1878847ac9001b2025718fe57f994213800b327 (diff) | |
| download | linux-a2475e624e2e80e65f371d44b712c93a144bfad9.tar.gz linux-a2475e624e2e80e65f371d44b712c93a144bfad9.tar.bz2 linux-a2475e624e2e80e65f371d44b712c93a144bfad9.zip | |
drm/amd/display: correct asic type check V2
Check chip family also to avoid wrong identification.
V2: use the correct macro without AMDGPU prefix
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/calcs')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c index 51397b565ddf..bb183cc5087b 100644 --- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c @@ -736,10 +736,11 @@ static void hack_bounding_box(struct dcn_bw_internal_vars *v, hack_force_pipe_split(v, context->streams[0]->timing.pix_clk_100hz); } -unsigned int get_highest_allowed_voltage_level(uint32_t hw_internal_rev, uint32_t pci_revision_id) +unsigned int get_highest_allowed_voltage_level(uint32_t chip_family, uint32_t hw_internal_rev, uint32_t pci_revision_id) { /* for low power RV2 variants, the highest voltage level we want is 0 */ - if (ASICREV_IS_RAVEN2(hw_internal_rev)) + if ((chip_family == FAMILY_RV) && + ASICREV_IS_RAVEN2(hw_internal_rev)) switch (pci_revision_id) { case PRID_DALI_DE: case PRID_DALI_DF: @@ -1324,6 +1325,7 @@ bool dcn_validate_bandwidth( BW_VAL_TRACE_FINISH(); if (bw_limit_pass && v->voltage_level <= get_highest_allowed_voltage_level( + dc->ctx->asic_id.chip_family, dc->ctx->asic_id.hw_internal_rev, dc->ctx->asic_id.pci_revision_id)) return true; |