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author | Arindam Nath <arindam.nath@amd.com> | 2017-04-26 17:39:56 +0530 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 18:06:47 -0400 |
commit | 03ea364c8e156b2bb5c64465718e8ebd75e3df22 (patch) | |
tree | f8afa2831da260206e3f5efef62bae36944cb40a /drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | |
parent | ba624cddbc002816e376d588290a48f77ff4b06f (diff) | |
download | linux-03ea364c8e156b2bb5c64465718e8ebd75e3df22.tar.gz linux-03ea364c8e156b2bb5c64465718e8ebd75e3df22.tar.bz2 linux-03ea364c8e156b2bb5c64465718e8ebd75e3df22.zip |
drm/amd/display: fix resume hang because of DP short pulse
There is a hard hang observed during resume from S3 when
the system receives a DP short pulse interrupt. This is
because there are two code paths contending for GPIO
access for AUX channel transactions. One such path is
through amdgpu_dm_display_resume() function which is
invoked from the regular system resume code path. The
other path is through handle_hpd_rx_irq(), which is
invoked in response to system receiving DP short pulse
interrupt. handle_hpd_rx_irq() guards against conflicting
GPIO access using hpd_lock, but the GPIO access from
amdgpu_dm_display_resume() remains unguarded.
This patch makes sure we use hpd_lock inside
amdgpu_dm_display_resume() to avoid race conditions
for GPIO access.
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c')
0 files changed, 0 insertions, 0 deletions