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| author | Shiwu Zhang <shiwu.zhang@amd.com> | 2023-07-20 15:25:15 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-07-25 13:47:26 -0400 |
| commit | 9bc12db4e2f62fe257ce02a8d4aa20e9c47fbe0e (patch) | |
| tree | 9036ec0a5ed6a405b36616eba8fa4a9516ed4b00 /drivers/gpu/drm/amd/amdgpu | |
| parent | 818c158fd4e43d07f29cb7eb1a6d0c06a881844f (diff) | |
| download | linux-9bc12db4e2f62fe257ce02a8d4aa20e9c47fbe0e.tar.gz linux-9bc12db4e2f62fe257ce02a8d4aa20e9c47fbe0e.tar.bz2 linux-9bc12db4e2f62fe257ce02a8d4aa20e9c47fbe0e.zip | |
drm/amdgpu: fix the indexing issue during rlcg access ctrl init
In case that the GET_INST() is used for looping, only loops for the
times of actual num of xcc, otherwise GET_INST() will return the invalid
index, a.k.a -1
And also remove the redundant mask checking in case of GET_INST()
Signed-off-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index 9053435488c5..86a84a0970f0 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c @@ -1075,12 +1075,11 @@ static void gfx_v9_4_3_xcc_unset_safe_mode(struct amdgpu_device *adev, static void gfx_v9_4_3_init_rlcg_reg_access_ctrl(struct amdgpu_device *adev) { - int xcc_id; + int xcc_id, num_xcc; struct amdgpu_rlcg_reg_access_ctrl *reg_access_ctrl; - for (xcc_id = 0; xcc_id < AMDGPU_MAX_RLC_INSTANCES; xcc_id++) { - if (((1 << xcc_id) & adev->gfx.xcc_mask) == 0) - continue; + num_xcc = NUM_XCC(adev->gfx.xcc_mask); + for (xcc_id = 0; xcc_id < num_xcc; xcc_id++) { reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[GET_INST(GC, xcc_id)]; reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regSCRATCH_REG0); reg_access_ctrl->scratch_reg1 = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regSCRATCH_REG1); |