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authorCandice Li <candice.li@amd.com>2024-10-17 12:21:40 +0800
committerAlex Deucher <alexander.deucher@amd.com>2024-11-04 12:06:23 -0500
commit12e5df81bb1f006be2bc8341c732ebd966e573e4 (patch)
tree519084729235987728193785d0b8d594d7a1e163 /drivers/gpu/drm/amd/amdgpu/ta_ras_if.h
parentd2e3961ae37171811a3d442e601599b85711adcb (diff)
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drm/amdgpu: Add nps_mode in RAS init_flag
Add nps_mode in RAS init_flag. Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/ta_ras_if.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/ta_ras_if.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h b/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h
index 3ac56a9645eb..21b71a427b1f 100644
--- a/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h
+++ b/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h
@@ -113,6 +113,14 @@ enum ta_ras_address_type {
TA_RAS_PA_TO_MCA,
};
+enum ta_ras_nps_mode {
+ TA_RAS_UNKNOWN_MODE = 0,
+ TA_RAS_NPS1_MODE = 1,
+ TA_RAS_NPS2_MODE = 2,
+ TA_RAS_NPS4_MODE = 4,
+ TA_RAS_NPS8_MODE = 8,
+};
+
/* Input/output structures for RAS commands */
/**********************************************************/
@@ -139,6 +147,7 @@ struct ta_ras_init_flags {
uint8_t dgpu_mode;
uint16_t xcc_mask;
uint8_t channel_dis_num;
+ uint8_t nps_mode;
};
struct ta_ras_mca_addr {