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| author | Wenjing Liu <wenjing.liu@amd.com> | 2022-06-23 16:09:25 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-10-06 12:02:43 -0400 |
| commit | 46c87432e3d4cea8e1a7ac6e9e3ebd2462f47617 (patch) | |
| tree | f37560b488f12b48f31b5ceffa76180c0bc28c44 /drivers/gpu/drm/amd/amdgpu/soc21.c | |
| parent | f638fe27b817c755e017b8a6ae4b9b4224461941 (diff) | |
| download | linux-46c87432e3d4cea8e1a7ac6e9e3ebd2462f47617.tar.gz linux-46c87432e3d4cea8e1a7ac6e9e3ebd2462f47617.tar.bz2 linux-46c87432e3d4cea8e1a7ac6e9e3ebd2462f47617.zip | |
drm/amd/display: Add missing mask sh for SYM32_TP_SQ_PULSE register
There is a missing register mask in dcn32 causing the hardware
programming is not executed when programming SQ_num test pattern for
DP2.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc21.c')
0 files changed, 0 insertions, 0 deletions